DS21448 datasheet(13/60 Pages) DALLAS

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DS21448 3.3V T1/E1/J1 Quad Line Interface

13 of 60

I/O

FUNCTION

TVSS1–TVSS4

—

Transmitter Signal Ground for Transmitter Outputs

VSS1–VSS4

—

Signal Ground

Note 1: G.703 requires an accuracy of ±50ppm for T1 and E1. TR62411 and ANSI specs require ±32ppm accuracy for T1 interfaces.

3. DETAILED DESCRIPTION

The DS21448 contains four independent LIUs that share a common interface for configuration and status. The user

can choose between three different means of accessing the device: a parallel microprocessor interface, a serial

interface, and a hardwired mode, which configures the device by setting levels on the device’s pins. The

DS21448’s four chip selects (

CS1, CS2, CS3, and CS4) determine which LIU is accessed when using the parallel

or serial interface modes. Four sets of identical register maps exist, one for each channel. Using the appropriate

chip select accesses a channel’s register map.

The analog AMI/HDB3 waveform off the E1 line or the AMI/B8ZS waveform off the T1 line is transformer-coupled

into the RTIP and RRING pins of the DS21448. The user has the option to use internal termination, software

selectable for 75

W/100W/120W applications, or external termination. The device recovers clock and data from the

analog signal and passes it through the jitter attenuation mux, outputting the received line clock at RCLK and

bipolar or NRZ data at RPOS and RNEG. The DS21448 contains an active filter that reconstructs the analog-

received signal for the nonlinear losses that occur in transmission. The receive circuitry is also configurable for

various monitor applications. The device has a usable receive sensitivity of 0 to -43dB for E1 and 0 to -36dB for T1

that allows the device to operate on 0.63mm (22AWG) cables up to 2.5km (E1) and 6k feet (T1) in length. Data

input at TPOS and TNEG is sent through the jitter attenuation mux to the waveshaping circuitry and line driver. The

DS21448 drives the E1 or T1 line from the TTIP and TRING pins through a coupling transformer. The line driver

can handle both CEPT 30/ISDN-PRI lines for E1 and long-haul (CSU) or short-haul (DSX-1) lines for T1.

3.1 DS21448 and DS21Q348 Differences

The DS21448 BGA is a monolithic quad-port LIU that is a replacement for the DS21Q348. The additional features

of JTAG, transmit driver disable, and the serial interface in the DS21448 have changed the function of several pins,

as shown in Table 3-A.

Table 3-A. DS21448 vs. DS21Q348 Pin Differences

DS21Q348

DS21448

VSM

N.C.

VSS

SCLK

A4/SDO

VSS

SDI

TEST

TXDIS/TEST

N.C.

JTRST*

N.C.

JTMS*

N.C.

JTCLK

N.C.

JTDI*

N.C.

JTDO

*DS21448 pin is internally pulled up.

4. PORT OPERATION

4.1 Hardware Mode

The DS21448 supports a hardware configuration mode that allows the user to configure the device by setting levels

on the device’s pins. This mode allows the DS21448 configuration without the use of a microprocessor, simplifying

designs. Not all of the device features are supported in the hardware mode.

In hardware mode (BIS0 = 1, BIS1 = 1) several pins have been redefined so they can be used for initializing the

DS21448. Refer to Table 2-B and Table 2-E for pin assignment and definition. Because of limited pin count, several

DS21448 Datasheet(PDF) 13 Page - Dallas Semiconductor

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