LP8720 datasheet(11/26 Pages) TI1

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LP8720

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SNVS575B – JULY 2008 – REVISED MAY 2013

Power-On Reset

(1)

Unless otherwise noted, VVBATT = VVINB = VVIN1 =VVIN2 = 3.6V, GND = GNDB = 0V, CVBATT =CVIN1= CVIN2=2.2 µF, CVINB = 10

µF. Typical values and limits appearing in normal type apply for TJ = 25°C. Limits appearing in boldface type apply over the

entire junction temperature range for operation, TJ= -40 to +125°C.

(1)

Limit

Parameter

Test Conditions

Typ

Units

Min

Max

VPOR_HI

POR higher threshold

VVBATT rising

2.2

2.0

2.4

VPOR_LO

POR lower threshold

VVBATT falling

(2)

1.4

(1)

All limits are specified. All electrical characteristics having room-temperature limits are tested during production with TJ = 25°C. All hot

and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical

process control.

(2)

Ensured by design.

Logic and Control

Unless otherwise noted, VVBATT = VVINB = VVIN1 = VVIN2 = 3.6V, GND=GNDB=0V, CVBATT =CVIN1= CVIN2 = 2.2 µF, CVINB = 10 µF.

Typical values and limits appearing in normal type apply for TJ=25°C. Limits appearing in boldface type apply over the entire

junction temperature range for operation, TJ= -40 to +125°C

(1)

Limit

Parameter

Test Conditions

Typ

Units

Min

Max

Logic and Control Inputs

VIL

Input Low Level

EN, SCL, SDA, DVS

0.4

VIH

Input High Level

EN, SCL, SDA, DVS

1.2

IIL

Input Current

All logic inputs

-5

µA

RPD

Pull-Down Resistance

From EN to GND

550

300

900

Ω

Logic and Control Outputs

VOL

Output Low Level

IRQ_N, SDA, IOUT = 2 mA

0.4

VOH

Output High Level

IRQ_N, SDA are Open drain outputs.

µA

(1)

All limits are specified. All electrical characteristics having room-temperature limits are tested during production with TJ = 25°C. All hot

and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical

process control.

Buck Converter

Unless otherwise noted, VVBATT = VVINB = VVIN1 = VVIN2 = 3.6V, GND = GNDB = 0V, CVBATT = CVIN1 = CVIN2 = 2.2 µF, CVINB = 10

µF. Typical values and limits appearing in normal type apply for TJ=25°C. Limits appearing in boldface type apply over the

entire junction temperature range for operation, TJ= -40 to +125°C

(1) (2)

Limit

Parameter

Test Conditions

Typ

Units

Min

Max

VFB

Feedback Voltage

3.0V

≤ VIN ≤ 4.5V external resistor divider

0.5

0.485

0.515

VBUCK

Output Voltage, PWM Mode

3.0V

≤ VIN ≤ 4.5V

1.2

1.164

1.236

VVOUT,PFM

Output Voltage regulation in

See(3)

PFM mode relative to

1.5%

regulation in PWM mode

VOUT

Line Regulation

3.0V

≤ VIN ≤ 4.5V

0.14

%/V

IOUT = 10 mA

VOUT

Load Regulation

100mA

≤ IOUT ≤ 300mA

0.09

%/mA

ILIM_PWM

Switch Peak Current Limit

PWM Mode @ 400 mA

900

500

3.0V

≤ VIN ≤ 4.5V

RDSON(P)

P channel FET on resistance

VIN = 3.6V, ID = 100 mA

310

500

Ω

RDSON(N)

N channel FET on resistance

160

300

Ω

(1)

All limits are specified. All electrical characteristics having room-temperature limits are tested during production with TJ = 25°C. All hot

and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical

process control.

(2)

Ensured for output voltages no less than 1.0V

(3)

Ensured by design.

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