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LPC660 Datasheet(PDF) 2 Page - Texas Instruments |
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LPC660 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 24 page ![]() LPC660 SNOS554D – MAY 1998 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) Differential Input Voltage ±Supply Voltage Supply Voltage (V+ − V−) 16V Output Short Circuit to V+ (2) Output Short Circuit to V− (3) Lead Temperature (Soldering, 10 sec.) 260°C Storage Temp. Range −65°C to +150°C Junction Temperature (4) 150°C ESD Rating (C = 100 pF, R = 1.5 k Ω) 1000V Power Dissipation (4) Current at Input Pin ±5 mA Current at Output Pin ±18 mA Voltage at Input/Output Pin (V+) + 0.3V, (V−) − 0.3V Current at Power Supply Pin 35 mA (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. (2) Do not connect output to V+when V+ is greater than 13V or reliability may be adversely affected. (3) Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature and/or multiple Op Amp shorts can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely affect reliability. (4) The maximum power dissipation is a function of TJ(max), θJA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max)–TA)θJA. Operating Ratings (1) Temperature Range LPC660AM −55°C ≤ TJ ≤ +125°C LPC660AI −40°C ≤ TJ ≤ +85°C LPC660I −40°C ≤ TJ ≤ +85°C Supply Range 4.75V to 15.5V Power Dissipation (2) Thermal Resistance ( θJA), (3) 14-Pin Ceramic DIP 90°C/W 14-Pin Molded DIP 85°C/W 14-Pin SOIC 115°C/W 14-Pin Side Brazed Ceramic DIP 90°C/W (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. (2) For operating at elevated temperatures, the device must be derated based on the thermal resistance θJA with PD = (TJ–TA)/θJA. (3) All numbers apply for packages soldered directly into a PC board. 2 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: LPC660 |
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