TMS320DM6435 datasheet(75/252 Pages) TI1

75 / 252 page

TMS320DM6435

Digital Media Processor

www.ti.com

SPRS344C – NOVEMBER 2006 – REVISED JUNE 2008

RESERVED

FASTBOOT

RESERVED

R-0000 0000 0001

R-L

R-000

RSV

PLLMS

RSV

DAEM

RESERVED

BOOTMODE

R-0

R-LLL

R-0

R-LLL

R-0000

R-LLLL

LEGEND: R = Read only; L = pin state latched at reset rising edge; -n = value after reset

Figure 3-3. BOOTCFG Register—0x01C4 0014

Table 3-9. BOOTCFG Register Description

Bit

Field Name

Description

31:20

RESERVED

Reserved. Writes have no effect.

Fastboot (see Section 3.4.1.1, FASTBOOT)

This field is used by the device bootloader code to determine if it needs to speed up the device to PLL mode

before booting.

FASTBOOT

0 = No Fastboot

1 = Fastboot

The default value is latched from FASTBOOT configuration pin.

18:15

RSV

Reserved. Writes have no effect.

PINMUX0.AEAW default [AEAW] and Fastboot PLL Multiplier Select [PLLMS] (see Section 3.5.1.2, EMIFA

Address Width Select [AEAW] and Fast Boot PLL Multiplier Select [PLLMS])

The AEAW[2:0]/PLLMS configuration pins serve two purposes:

AEAW[2:0]: 8-bit EMIFA (Async) Pinout Mode 1 Address Width

If AEM = 001, this field serves as AEAW and it indicates the 8-bit EMIFA (Async) Pinout Mode 1 Address

Width. In this case, this field affects pin mux control only by setting the default of Pin Mux Control Register

14:12

PLLMS

PINMUX0.AEAW[2:0]. This field does not affect EMIFA register settings.

For more details on the AEAW settings, see Section 3.7.2.1, PINMUX0 Register Description.

PLLMS: Fastboot PLL Multiplier Select

If FASTBOOT = 1 and AEM[2:0] = 000b or 101b, this field selects the FASTBOOT PLL Multiplier. In this case,

this field does not affect the pin mux control or the EMIFA register settings. The bootloader code uses this field

to determine the PLL multiplier used for Fastboot.

RSV

Reserved. Writes have no effect.

PINMUX0.AEM default [DAEM] (see Section 3.5.1.1, EMIFA Pinout Mode (AEM[2:0]))

For more details on the AEM settings, see Section 3.7.2.1, PINMUX0 Register Description.

10:8

DAEM

This field affects pin mux control by setting the default of PINMUX0.AEM. This field does not affect EMIFA

The default value is latched from the AEM[2:0] configuration pins.

7:4

RESERVED

Reserved. Writes have no effect.

Boot Mode (see Section 3.4.1, Boot Modes)

3:0

BOOTMODE

This field is used in conjunction with FASTBOOT, AEM, and PLLMS to determine the device boot mode.

The default value is latched from the BOOTMODE[3:0] configuration pins.

Submit Documentation Feedback

Device Configuration

TMS320DM6435 Datasheet(PDF) 75 Page - Texas Instruments

TMS320DM6435 Datasheet(HTML) 75 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL