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AD7490 Datasheet(PDF) 2 Page - Analog Devices |
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AD7490 Datasheet(HTML) 2 Page - Analog Devices |
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2 / 24 page  –2– AD7490–SPECIFICATIONS REV. A (VDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK 1 = 20 MHz, T A = TMIN to TMAX, unless otherwise noted.) Parameter B Version 2 Unit Test Conditions/Comments DYNAMIC PERFORMANCE fIN = 50 kHz Sine Wave, fSCLK = 20 MHz Signal to Noise +1 Distortion (SINAD) 3 69 dB min @ 5 V, 70.5 dB typ 68 dB min @ 3 V, 69.5 dB typ Signal to Noise Ratio (SNR) 3 69.5 dB min Total Harmonic Distortion (THD) 3 –74 dB max @ 5 V, –84 dB typ –71 dB max @ 3 V, –77 dB typ Peak Harmonic or Spurious Noise (SFDR) 3 –75 dB max @ 5 V, –86 dB typ –73 dB max @ 3 V, –80 dB typ Intermodulation Distortion (IMD) 3 fa = 40.1 kHz, fb = 41.5 kHz Second Order Terms –85 dB typ Third Order Terms –85 dB typ Aperture Delay 10 ns typ Aperture Jitter 50 ps typ Channel-to-Channel Isolation 3 –82 dB typ fIN = 400 kHz Full Power Bandwidth 8.2 MHz typ @ 3 dB 1.6 MHz typ @ 0.1 dB DC ACCURACY 3 Resolution 12 Bits Integral Nonlinearity ±1 LSB max Differential Nonlinearity –0.95/+1.5 LSB max Guaranteed No Missed Codes to 12 Bits 0V to VREF IN Input Range Straight Binary Output Coding Offset Error ±8 LSB max ±0.6 LSB typ Offset Error Match ±0.5 LSB max Gain Error ±2 LSB max Gain Error Match ±0.6 LSB max 0V to 2 VREF IN Input Range –VREF IN to +VREF IN Biased about VREF with Twos Complement Output Coding Offset Positive Gain Error ±2 LSB max Positive Gain Error Match ±0.5 LSB max Zero Code Error ±8 LSB max ±0.6 LSB typ Zero Code Error Match ±0.5 LSB max Negative Gain Error ±1 LSB max Negative Gain Error Match ±0.5 LSB max ANALOG INPUT Input Voltage Ranges 0 to REFIN V RANGE Bit Set to 1 0 to 2 REFIN V RANGE Bit Set to 0, VDD/VDRIVE = 4.75 V to 5.25 V for 0 to 2 REFIN DC Leakage Current ±1 µA max Input Capacitance 20 pF typ REFERENCE INPUT REFIN Input Voltage 2.5 V ±1% Specified Performance DC Leakage Current ±1 µA max REFIN Input Impedance 36 k Ω typ fSAMPLE = 1 MSPS LOGIC INPUTS Input High Voltage, VINH 0.7 VDRIVE V min Input Low Voltage, VINL 0.3 VDRIVE V max Input Current, IIN ±1 µA max Typically 10 nA, VIN 5 0 V or VDRIVE Input Capacitance, CIN 4 10 pF max LOGIC OUTPUTS Output High Voltage, VOH VDRIVE – 0.2 V min ISOURCE = 200 µA; V DD = 2.7 V to 5.25 V Output Low Voltage, VOL 0.4 V max ISINK = 200 µA Floating-State Leakage Current ±10 µA max Weak/ Tri Bit Set to 0 Floating-State Output Capacitance 4 10 pF max Weak/ Tri Bit Set to 0 Output Coding Straight (Natural) Binary Coding Bit Set to 1 Twos Complement Coding Bit Set to 0 |
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