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TMS570LS1114 Datasheet(PDF) 141 Page - Texas Instruments |
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TMS570LS1114 Datasheet(HTML) 141 Page - Texas Instruments |
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141 / 169 page  TMS570LS1114 www.ti.com SPNS188B – OCTOBER 2012 – REVISED FEBRUARY 2015 NOTE • A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the VIHmin of the SCL signal) to bridge the undefined region of the falling edge of SCL. • The maximum th(SDA-SCLL) has only to be met if the device does not stretch the LOW period (tw(SCLL)) of the SCL signal. • A Fast-mode I2C-bus device can be used in a Standard-mode I2C-bus system, but the requirement tsu(SDA-SCLH) ≥ 250 ns must then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line tr max + tsu(SDA-SCLH). • Cb = total capacitance of one bus line in pF. If mixed with fast-mode devices, faster fall- times are allowed. Copyright © 2012–2015, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 141 Submit Documentation Feedback Product Folder Links: TMS570LS1114 |
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