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HV7351 Datasheet(PDF) 17 Page - Microchip Technology |
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HV7351 Datasheet(HTML) 17 Page - Microchip Technology |
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17 / 26 page ![]() 2015 Microchip Technology Inc. DS20005412A-page 17 HV7351 3.4 6-Bit Divide-by-N Counter The TCK and TCK pins are the input clock for the 6-bit divide-by-N counter. It generates the clock frequency for the 16-/32-bit serial shift register for the output P- and N-Channel patterns. Each clock cycle will set the TX output to be either at VPP, VNN, ground or high- impedance, depending on what was preprogrammed in their corresponding registers. TABLE 3-3: 6-BIT DIVIDE-BY-N COUNTER REGISTER MSB LSB Output Shift Register Clock Frequency 0 0 0000 fTCK ÷ 64 0 0 0001 fTCK ÷ 63 0 0 0010 fTCK ÷ 62 0 0 0011 fTCK ÷ 61 • • • • • • • • • • • • • • • • • • • • • 1 1 1100 fTCK ÷ 4 1 1 1101 fTCK ÷ 3 1 1 1110 fTCK ÷ 2 1 1 1111 fTCK ÷ 1 |
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