 2015 Microchip Technology Inc.

DS20005455A-page 5

HV582

1.1

Logic Characteristics

TABLE 1-2:

LOGIC FUNCTION TRUTH TABLE

Function

Inputs

Outputs

RST

Data

CLK

LE

OE

POL

OL

OH

Shift Reg.

1 2...96

HV

Outputs

1 2...96

Data Out

All Low

L

X

X

X

H

X

L

X

* *...*

L L...L

*

All High

L

X

X

X

H

X

H

L

* *...*

H H...H

*

Output High Z

L

X

X

X

L

X

X

X

* *...*

Z Z...Z

*

Invert Mode

L

X

X

L

H

H

H

H

* *...*

* *...*(b)

*

Load S/R

L

H or L

L

H

L

H

H

H or L *...*

* *...*

*

Store Data

in Latches

L

X

X

L

H

L

H

H

* *...*

* *...*

*

L

X

X

L

H

H

H

H

* *...*

* *...* (b)

*

Transparent

Mode

L

L

H

H

L

H

H

L * *...*

L * *...*

*

L

H

H

H

L

H

H

H * *...*

H * *...*

*

Reset

H

X

X

X

H

L

H

H

L * *...*

L * *...*

L

Legend:

D= Data

H

= Level High

L

= Level Low

X

= Don’t Care

Z

= High Impedance

b= Inversion

*

= Dependent of previous stage’s state before the last CLK or last LE high

= Low-to-High Transition

TABLE 1-3:

OUTPUT SHIFT OPERATION

Input

Output

DIR

Shift Operation

D1A

D1B

L

D1 to D16

D2A

D2B

L

D17 to D32

D3A

D3B

L

D33 to D48

D4A

D4B

L

D49 to D64

D5A

D5B

L

D65 to D80

D6A

D6B

L

D81 to D96

D1B

D1A

H

D16 to D1

D2B

D2A

H

D32 to D17

D3B

D3A

H

D48 to D33

D4B

D4A

H

D64 to D49

D5B

D5A

H

D80 to D65

D6B

D6A

H

D96 to D81