OPA569 datasheet(18/28 Pages) TI1

18 / 28 page

OPA569

SBOS264A

www.ti.com

PARALLEL OPERATION

The OPA569 allows parallel operation of multiple op amps to

extend output current capability or improve the output volt-

age swing to the rail. Special internal circuitry causes the

load current to be shared equally between two (or more) op

amps.

Figure 14 shows two ways to connect the input terminals.

When the amplifier inputs are connected in parallel, the

effective offset voltage is averaged and the bandwidth and

slew rate performance are the same as that of a single

amplifier. It is also possible to use one amplifier to be the

“master” and connect the other inputs to a voltage within the

common-mode input range of the amplifier; however, slew

rate and bandwidth performance will be degraded.

For best performance, keep additional capacitance at the

Parallel Out pins to a minimum and avoid routing these lines

close to other lines that might see large voltage swings.

FIGURE 14. Parallel Operation.

Mold Compound (Epoxy)

Leadframe Die Pad

Exposed at Base of the Package

Leadframe (Copper Alloy)

IC (Silicon)

Die Attach (Epoxy)

FIGURE 15. Section View of a PowerPAD Package.

PowerPAD THERMALLY ENHANCED PACKAGE

The OPA569 uses the SO-20 PowerPAD package, a ther-

mally enhanced, standard size IC package designed to

eliminate the use of bulky heatsinks and slugs traditionally

used in thermal packages. This package can be easily

mounted using standard PCB assembly techniques.

The PowerPAD package is designed so that the leadframe

die pad (or thermal pad) is exposed on the bottom of the IC,

as shown in Figure 15. This provides an extremely low

thermal resistance (

JC) path between the die and the

exterior of the package. The thermal pad on the bottom of

the IC can then be soldered directly to the PCB, using the

PCB as a heatsink. In addition, plated-through holes (vias)

provide a low thermal resistance heat flow path to the back

side of the PCB.

Soldering the PowerPAD to the PCB ia always recom-

mended, even with applications that have low power dissipa-

tion. This provides the necessary thermal and mechanical

connection between the leadframe die pad and the PCB.

OPA569

(A2)

V+

V–

(a) Inputs connected in parallel.

17,

12,

14,

Parallel Out 2

Parallel Out 1

OPA569

(A1)

V+

V–

17,

12,

14,

Parallel Out 2

Parallel Out 1

OPA569

(A2)

V+

V–

(b) Amplifier A1 as “master”, A2 as “slave”.

17,

12,

14,

Parallel Out 2

Parallel Out 1

OPA569

(A1)

V+

V–

17,

12,

14,

Parallel Out 2

Parallel Out 1

PowerPAD Assembly Process

1. The PowerPAD must be connected to the most negative

supply voltage of the device, which will be ground in single-

supply applications and V– in split-supply applications.

2. Prepare the PCB with a top-side etch pattern, as shown in

Figure 16. There should be etch for the leads as well as

etch for the thermal land.

3. Place the recommended number of plated-through holes

(or thermal vias) in the area of the thermal pad. These

holes should be 13 mils in diameter. They are kept small

so that solder wicking through the holes is not a problem

during reflow. The minimum recommended number of

holes for the SO-20 PowerPAD package is 24, as shown

in Figure 16.

4. It is recommended, but not required, to place a small

number of additional holes under the package and outside

the thermal pad area. These holes provide an additional

heat path between the copper land and the ground plane.

They may be larger because they are not in the area to be

soldered, so wicking is not a problem. This is illustrated in

Figure 16.

OPA569 Datasheet(PDF) 18 Page - Texas Instruments

OPA569 Datasheet(HTML) 18 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Download

Link URL