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OPA685 Datasheet(PDF) 2 Page - Texas Instruments |
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OPA685 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 32 page ![]() 2 ® OPA685 SPECIFICATIONS: VS = ±5V RF = 402Ω, RL = 100Ω, and G = +8, (Figure 1 for AC performance only), unless otherwise noted. OPA685U, N TYP GUARANTEED 0 °C to –40 °C to MIN/ TEST PARAMETER CONDITIONS +25 °C +25 °C(2) 70 °C(3) +85 °C(3) UNITS MAX LEVEL(1) AC PERFORMANCE (Figure 1) Small-Signal Bandwidth (VO = 0.5Vp-p) G = +1, RF = 523Ω 1200 MHz typ C G = +2, RF = 511Ω 900 MHz typ C G = +8, RF = 402Ω 420 360 350 320 MHz min B G = +16, RF = 249Ω 340 MHz typ C Bandwidth for 0.1dB Gain Flatness G = +2, VO = 0.5Vp-p, RF =523Ω 350 150 80 70 MHz min B Peaking at a Gain of +1 RF = 523Ω, VO = 0.5Vp-p 3 4.5 5 6.0 dB max B Large Signal Bandwidth G = +8, VO = 4Vp-p 350 MHz typ C Slew Rate G = –8, VO = 4V Step 4200 3000 2500 2200 V/ µs min B G = +8, VO = 4V Step 2900 2400 2400 2100 V/ µs min B Rise/Fall Time G = +8, VO = 0.5V Step 0.7 ns typ C G = +8, VO = 4V Step 1.0 ns typ C Settling Time to 0.02% G = +8, VO = 2V Step 4 ns typ C 0.1% G = +8, VO = 2V Step 3 ns typ C Harmonic Distortion G = +8, f = 10MHz, VO = 2Vp-p 2nd Harmonic RL = 100Ω –66 –59 –56 –53 dBc max B RL ≥ 500Ω –75 –69 –66 –63 dBc max B 3rd Harmonic RL = 100Ω –90 –83 –77 –74 dBc max B RL ≥ 500Ω –84 –78 –76 –75 dBc max B Input Voltage Noise f > 1MHz 1.7 1.8 2.2 2.3 nV/ √Hz max B Non-Inverting Input Current Noise f > 1MHz 13 15 15 15 pA/ √Hz max B Inverting Input Current Noise f > 1MHz 19 22 22 22 pA/ √Hz max B Differential Gain G = +2, NTSC, VO = 1.4Vp, RL = 150Ω 0.10 % typ C Differential Phase G = +2, NTSC, VO = 1.4Vp, RL = 150Ω 0.01 deg typ C DC PERFORMANCE(4) Open-Loop Transimpedance Gain (ZOL) VO = 0V, RL = 100Ω 42 26 24 23 k Ω min A Input Offset Voltage VCM = 0V ±1.7 ±3.5 ±5 ±7 mV max A Average Offset Voltage Drift VCM = 0V +35 +40 µV/°C max B Non-Inverting Input Bias Current VCM = 0V +56 +90 ±100 ±130 µA max A Average Non-Inverting Input Bias Current Drift VCM = 0V –530 –570 nA/ °C max B Inverting Input Bias Current VCM = 0V ±10 ±100 ±120 ±150 µA max A Average Inverting Input Bias Current Drift VCM = 0V –500 –560 nA °/C max B INPUT Common-Mode Input Range(5) (CMIR) ±3.4 ±3.2 ±3.1 ±3.0 V min A Common-Mode Rejection Ratio (CMRR) VCM = 0V 54 49 48 48 dB min A Non-Inverting Input Impedance 87 || 2 k Ω || pF typ C Inverting Input Resistance (RI) Open-Loop 19 Ω typ C OUTPUT Voltage Output Swing No Load ±4.1 ±3.9 ±3.8 ±3.8 V min A 100 Ω Load ±3.6 ±3.3 ±3.2 ±3.1 V min A Current Output, Sourcing VO = 0 +130 +90 +75 +70 mA min A Current Output, Sinking VO = 0 –90 –60 –50 –45 mA min A Closed-Loop Output Impedance G = +8, f = 100kHz 0.2 Ω typ C DISABLE (Disabled Low) Power Down Supply Current (+VS)VDIS = 0 –320 µA typ C Disable Time 100 ns typ C Enable Time 100 ns typ C Off Isolation G = +8, 10MHz 70 dB typ C Output Capacitance in Disable 3 pF typ C Turn On Glitch G = +2, RL = 150Ω, VIN = 0 ±160 mV typ C Turn Off Glitch G = +2, RL = 150Ω, VIN = 0 ±20 mV typ C Enable Voltage 3.3 3.5 3.6 3.7 V min A Disable Voltage 1.8 1.7 1.6 1.5 V max A Control Pin Input Bias Current (DIS) VDIS = 0 115 160 160 160 µA max A POWER SUPPLY Specified Operating Voltage ±5 V typ C Maximum Operating Voltage Range ±6 ±6 ±6 V max A Max Quiescent Current VS = ±5V 12.9 13.5 13.5 13.5 mA max A Min Quiescent Current VS = ±5V 12.9 12.5 11.9 11.2 mA min A Power Supply Rejection Ratio (–PSRR) Input Referred 55 49 47 46 dB typ A TEMPERATURE RANGE Specification: U, N –40 to +85 °C typ C Thermal Resistance, θ JA Junction-to-Ambient U SO-8 125 °C/W typ C N SOT23-6 150 °C/W typ C NOTES: (1) Test levels: (A) 100% tested at 25 °C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. (2) Junction temperature = ambient for 25 °C guaranteed specifications. (3) Junction temperature = ambient at low temperature limit: junction temperature = ambient +23 °C at high temperature limit for over temperature guaranteed specifications. (4) Current is considered positive out-of-node. VCM is the input common-mode voltage. (5) Tested < 3dB below minimum specified CMRR at ± CMIR limits. |
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