DS92CK16 datasheet(5/11 Pages) NSC

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Switching Characteristics (Continued)

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Notes 7, 8).

Symbol

Parameter

Conditions

Min

Typ

Max

Units

DIFFERENTIAL DRIVER TIMING REQUIREMENTS

PHLDD

Differential Propagation Delay High to Low. CrdCLK

to CLKI/O

L = 15 pF

L = 37.5Ω

Figures 6, 7

0.5

1.8

2.5

PLHDD

Differential Propagation Delay Low to High. CrdCLK

to CLKI/O

0.5

1.8

2.5

PHLCrd

CrdCLK

IN to CLKOUT Propagation Delay High to Low

L = 15 pF

Figures 8, 9

2.0

4.5

6.0

PLHCrd

CrdCLK

IN to CLKOUT Propagation Delay Low to High

2.0

4.5

6.0

SK1D

Duty Cycle Distortion (pulse skew)

PLH–tPHL| (Note 13)

600

SK2D

Differential Part-to-Part Skew (Note 14)

2.0

TLHD

Differential Transition Time (Note 9)

(20% to 80% )

0.4

0.75

1.4

THLD

Differential Transition Time (Note 9)

(80% to 20% )

0.4

0.75

1.4

PHZD

Transition Time High to TRI-STATE. DE to CLKI/O

PLZD

Transition Time Low to TRI-STATE. DE to CLKI/O

IN = 0V to VCC

L = 15 pF,

L = 37.5Ω

Figures 10, 11

PZHD

Transition Time TRI-STATE to High. DE to CLKI/O

PZLD

Transition Time TRI-STATE to Low. DE to CLKI/O

MAX

Maximum Operating Frequency (Note 15)

100

125

MHz

Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. These ratings are not meant to imply that the

devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.

Note 2: ESD Rating: ESD qualification is performed per the following: HBM (1.5 k

Ω, 100 pF), Machine Model (250V, 0Ω), IEC 1000-4-2. All VCC pins connected to-

gether, all ground pins connected together.

Note 3: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VID, VOD, VTH,

and VTL.

Note 4: All typicals are given for: VCC = +3.3V and TA = +25˚C.

Note 5: The VCMR range is reduced for larger VID. Example: If VID=400 mV, then VCMR is 0.2V to 2.2V A VID up to |VCC–0V| may be applied between the CLKI/O+

and CLKI/O− inputs, with the Common Mode set to VCC/2.

Note 6: Only one output should be momentarily shorted at a time. Do not exceed package power dissipation rating.

Note 7: CL includes probe and fixture capacitance.

Note 8: Generator waveform for all tests unless otherwise specified:f=25 MHz, Zo = 50

Ω,tr = 1 ns, tf =1ns(10%–90%). To ensure fastest propagation delay and

minimum skew, clock input edge rates should not be slower than 1 ns/V; control signals not slower than 3 ns/V. In general, the faster the input edge rate, the better

the AC performance.

Note 9: All device output transition times are based on characterization measurements and are guaranteed by design.

Note 10: tSK1R is the difference in receiver propagation delay (|tPLH–tPHL|) of one device, and is the duty cycle distortion of the output at any given temperature and

VCC. The propagation delay specification is a device to device worst case over process, voltage and temperature.

Note 11: tSK2R is the difference in receiver propagation delay between channels in the same device of any outputs switching in the same direction. This parameter

is guaranteed by design and characterization.

Note 12: tSK3R, part-to-part skew, is the difference in receiver propagation delay between devices of any outputs switching in the same direction. This specification

applies to devices over recommended operating temperature and voltage ranges, and across process distribution. TSK3R is defined as Max–Min differential propa-

gation delay.This parameter is guaranteed by design and characterization.

Note 13: tSK1D is the difference in driver propagation delay (|tPLH–tPHL|) and is the duty cycle distortion of the CLKI/O outputs.

Note 14: tSK2D part-to-part skew, is the difference in driver propagation delay between devices of any outputs switching in the same direction. This specification ap-

plies to devices over recommended operating temperature and voltage ranges, and across process distribution. tSK2D is defined as Max–Min differential propagation

delay.

Note 15: Generator input conditions: tr/tf < 1 ns, 50% duty cycle, differential (1.10V to 1.35V pk-pk). Output Criteria: 60%/40% duty cycle, VOL(max) 0.4V, VOH(min)

2.7V, Load=7pF (stray plus probes).

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