Pin No.

Pin Name

I/O

Description

17

V

CC

—

Power supply bias for the RF PLL charge pump. V

Bypass capacitors should be placed as close as possible to this pin and be connected

directly to the ground plane on the printed circuit board.

18

V

CC

—

Power supply bias for the RF PLL digital circuits. V

Bypass capacitors should be placed as close as possible to this pin and be connected

directly to the ground plane on the printed circuit board.

19

LD

O

Digital filtered lock detect output.

20

CE

I

Chip Enable input. High Impedance CMOS input. When this pin is set HIGH, the RF

and IF synthesizer systems are powered up. Powerdown is then controlled through the

MICROWIRE. When this pin is set LOW, the device is asynchronously powered down

21

GND

—

Ground for the RF PLL digital circuits.

22

OSCin

I

Reference oscillator input. The input is driven by an external AC coupled source. When

the OSC_FREQ bit is set LOW, a 19.20 MHz reference frequency should be used.

When the OSC_FREQ bit is set HIGH, a 19.68 MHz reference frequency should be

used.

23

V

CC

—

Power supply bias for the reference oscillator buffer. V

Bypass capacitors should be placed as close as possible to this pin and be connected

directly to the ground plane on the printed circuit board.

24

GND

—

Ground for the reference oscillator buffer.

25

GND

—

Ground for the IF PLL digital circuits.

26

V

CC

—

Power supply bias for the IF PLL digital circuits. V

Bypass capacitors should be placed as close as possible to this pin and be connected

directly to the ground plane on the printed circuit board.

27

NC

—

No Connect. Do not connect to any node on the printed circuit board.

28

V

CC

—

Power supply bias for the IF PLL buffer/ prescaler. V

Bypass capacitors should be placed as close as possible to this pin and be connected

directly to the ground plane on the printed circuit board.

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