GS8342T08/09/18/36BD-400/350/333/300/250

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Rev: 1.02 6/2012

10/35

© 2011, GSI Technology

Common I/O SigmaDDR-II B2 SRAM Truth Table

LD

R/W

DQ

Operation

A + 0

A + 1

↑

1

X

Hi-Z

Hi-Z

Deselect

↑

0

0

Write

↑

0

1

or

or

Read

Note:

Q is controlled by K clocks if C clocks are not used.

Burst of 2 Byte Write Clock Truth Table

BW

BW

Current Operation

D

D

K

↑

K

↑

K

↑

K

↑

K

↑

T

T

Write

Dx stored if BWn = 0 in both data transfers

D1

D2

T

F

Write

Dx stored if BWn = 0 in 1st data transfer only

D1

X

F

T

Write

Dx stored if BWn = 0 in 2nd data transfer only

X

D2

F

F

Write Abort

No Dx stored in either data transfer

X

X

Notes:

1. “1” = input “high”; “0” = input “low”; “X” = input “don’t care”; “T” = input “true”; “F” = input “false”.

2. If one or more BWn = 0, then BW = “T”, else BW = “F”.