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DA14581 Datasheet(PDF) 13 Page - Dialog Semiconductor

Part # DA14581
Description  Low Power Bluetooth Smart SoC with optimized boot time
PDF  152 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

DA14581 Datasheet(HTML) 13 Page - Dialog Semiconductor

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Datasheet
Revision 3.0
18-Dec-2015
CFR0011-120-00-FM Rev 5
13 of 152
© 2015 Dialog Semiconductor
DA14581
Low Power Bluetooth Smart SoC with optimized boot time
FINAL
with N = 0 to (216-1), M = 0 to (216-1)
• Programmable duty cycle:
• Separately programmable interrupt timer:
Timer 2
• 14-bit general purpose timer
• Ability to generate 3 Pulse Width Modulated signals
(PWM2, PWM3 and PWM4)
• Input clock frequency:
with N = 1, 2, 4 or 8
and sys_clk = 16 MHz or 32 kHz
• Programmable output frequency:
• Three outputs with Programmable duty cycle from
0 % to 100 %
• Used for white LED intensity (on/off) control
4.7.2 Wake-Up timer
The Wake-up timer can be programmed to wake up the
DA14581 from power down mode after a prepro-
grammed number of GPIO events.
Features
• Monitors any GPIO state change
• Implements debouncing time from 0 upto 63 ms
• Accumulates external events and compares the
number to a programmed value
• Generates an interrupt to the CPU
4.7.3 Watchdog timer
The Watchdog timer is an 8-bit timer with sign bit that
can be used to detect an unexpected execution
sequence caused by a software run-away and can
generate a full system reset or a Non-Maskable Inter-
rupt (NMI).
Features
• 8 bits down counter with sign bit, clocked with a
10.24 ms clock for a maximum 2.6 s time-out.
• Non-Maskable Interrupt (NMI) or WDOG reset.
• Optional automatic WDOG reset if NMI handler fails
to update the Watchdog register.
• Non-maskable Watchdog freeze of the Cortex-M0
Debug module when the Cortex-M0 is halted in
Debug state.
Maskable Watchdog freeze by user program. Note that
if the system is not remapped, i.e. SysRAM is at
address 0x20000000, then a watchdog fire will trigger
the BootROM code to be executed again.
4.8 CLOCK/RESET
4.8.1 Clocks
The Digital Controlled Xtal Oscillator (DXCO) is a
Pierce configured type of oscillator designed for low
power consumption and high stability. There are two
such crystal oscillators in the system, one at 16
MHz(XTAL16M) and a second at 32.768 kHz
(XTAL32K). The 32.768 kHz oscillator has no trimming
capabilities and is used as the clock of the Extended/
Deep Sleep modes. The 16 MHz oscillator can be
trimmed.
The principle schematic of the two oscillators is shown
in Figure 6 below. No external components to the
DA14581 are required other than the crystal itself. If
the crystal has a case connection, it is advised to con-
nect the case to ground.
There are 3 RC oscillators in the DA14581: one provid-
ing 16 MHz (RC16M), one providing 32 kHz (RC32K)
and one providing a frequency in the range of 10.5 kHz
(RCX).
4.8.2 Reset
The DA14581 comprises an RST pad which is active
high. It contains an RC filter for spikes suppression
with 400 k
 and 2.8 pF for the resistor and the capaci-
tor respectively. It also contains a 25 k
 pull-down
resistor. This pad should be connected to ground if not
needed by the application. The typical latency of the
f
16, 8, 4, 2 MHz or 32 kHz

M1
+

N1
+

+
------------------------------------------------------------------------
=
M1
+
M1
+

N1
+

+
-------------------------------------------- 100
%
=
T
16, 8, 4, 2 MHz or 32 kHz

ON 1
+

------------------------------------------------------------------------
=
fIN
sys_clk
N
-------------------
=
fOUT
fIN
2
------

 to
fIN
2
14
1
–
------------------



=
Figure 6: Crystal oscillator circuits
clock16MHz
16 MHz
clock32kHz
32.768 kHz
0-22.4 pF



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