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TLF4949 Datasheet(PDF) 18 Page - Infineon Technologies AG |
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TLF4949 Datasheet(HTML) 18 Page - Infineon Technologies AG |
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18 / 23 page ![]() Data Sheet 18 Rev. 1.0, 2012-05-07 TLF4949 Application Information Figure 8 Reset Circuit The reaction time of the reset circuit corresponds to its noise immunity. Standby output voltage drops below the reset threshold that are only marginally longer than the reaction time will result in a shorter reset delay times. The nominal reset delay time will be generated for standby output voltage drops longer than approximately 50µs. The typical reset output waveforms are shown in Figure 9 “Typical Reset Output Waveforms” on Page 18. Figure 9 Typical Reset Output Waveforms Reset .vsd OUT Ref 1,23V 22K 2.0V Reset 2uA D VReg Reset _diagram.vsd OUT t 1.5V 5.0V 40V VRT VIN VOUT tRD tRR tRD Reset VRT + 0.1V tR Switch on Switch off Input drop Dump Output overload |
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