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AX2061 Datasheet(PDF) 2 Page - ON Semiconductor |
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AX2061 Datasheet(HTML) 2 Page - ON Semiconductor |
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2 / 18 page ![]() AX2061 www.onsemi.com 2 Table 1. PIN FUNCTION DESCRIPTIONS Symbol Number of Pins Type Description COM0−4 5 A Row driver outputs SEG0−75 76 A Segment driver outputs SEL 1 I SPI select CLK 1 I SPI clock MISO 1 O SPI data output Can optionally be connected to read back register contents from the AX2061. Reading registers is not required for the AX2061 functionality. MOSI 1 I SPI data input LATCH 1 I/O Latch pixel data into pixel latches For alternative functionalities as well as required handling if not used see the circuit description section SYSCLK 1 I/O 32 kHz clock input (default) For alternative functionalities as well as required handling if not used see the circuit description section ICLK 1 I/O Internal 32 kHz clock output For alternative functionalities as well as required handling if not used see the circuit description section RREF 1 A Reference resistor for internal 32kHz oscillator Connect 1 MW from RREF pin to VSS Note that the reference resistor is required even if the internal 32 kHz oscillator is not used to generate the framing clock VD1 2 A Decoupling output for internally generated LCD voltage VD1 Connect 100 nF capacitor from VD1 to VSS VD2 2 A Decoupling output for internally generated LCD voltage VD2 Connect 220 nF capacitor from VD2 to VSS VD3 2 A Decoupling output for internally generated LCD voltage VD3 Connect 100 nF capacitor from VD3 to VSS VI 2 A Decoupling output for internal charge pump Connect 1 mF capacitor from VI to VSS, note that voltage levels on this pin can reach up to 5.2 V VDD 2 P Supply voltage input VDDCORE 2 A Decoupling output for internally generated supply voltage for the core functionality of the IC Connect 1 mF capacitor from VDDCORE to VSS CAPN 2 A Charge pump floating capacitor negative terminal Connect 100 nF capacitor between CAPN and CAPP CAPP 2 A Charge pump floating capacitor positive terminal Connect 1 mF capacitor between CAPN and CAPP VSS 10 P Ground TST 1 N Pin used for production testing, leave unconnected Total 116 A = analog input I = digital input signal O = digital output signal I/O = digital input/output signal N = not to be connected P = power or ground All digital inputs are Schmitt trigger inputs, digital input and output levels are LVCMOS/LVTTL compatible and 5 V tolerant. |
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