IW3602 datasheet(9/19 Pages) DIALOG

9 / 19 page

iW3602

AC/DC Digital Power Controller for

Dimmable LED Drivers

Rev. 1.0

iW3602

Datasheet

9 of 19

AC line after

Wall-dimmer

AC line before Wall-

dimmer

Figure 9.2 : Trailing-Edge Wall Dimmer Waveforms

Dimmer detection, or discovery, takes place during the third

cycle after start-up. The controller determines whether no

dimmer exists, or if there is a leading-edge dimmer or a

trailing-edge dimmer.

The VCROSS is internally generated by comparing the

digitalized VIN signal to the threshold of 0.25V during

dimming and 0.14V without a dimmer. The VIN period

(tPERIOD) is measured between two consecutive rising edge

zero-crossings. The tCROSS is generated by the internal digital

block (refer to Figure 9.3); when VIN_A is higher than 0.14V,

tCROSS is set to high and when VIN_A falls below 0.14V tCROSS

is reset to zero. If tCROSS is much shorter than the VIN period

then a dimmer is detected. The controller uses the filtered

derivatives to decide which type of dimmer is present. A

large positive derivative value indicates a leading-edge

dimmer. Then the controller enters leading-edge dimmer

mode; otherwise it enters trailing-edge dimmer mode.

During the dimmer detection stage, the OUTPUT(TR) keeps

high to turn on the switch FET in the chopping circuit. This

creates a resistive load for the wall dimmer.

0.14 V

OUTPUT(TR)

LED(EN)

VLED

VCROSS

VIN_A

tCROSS

tperiod

Figure 9.3 : Dimmer Detection

9.3 Dimmer Tracking and Phase

Measurements

The dimmer detection algorithm and the dimmer tracking

algorithm both depend on an accurate input voltage period

measurement. The VIN period is measured during the second

cycle of the dimmer detection process and is latched for use

thereafter. Using the measured VIN period in subsequent

calculations rather than a constant allows for automatic

50/60Hz operation and allows for a 10% frequency variation.

The phase measurement starts when VIN exceeds the rising

threshold until VIN falls below the falling threshold.

VCROSS

PERIOD

CROSS

0.14 V

Figure 9.4 : Dimmer Phase Measurement

The dimmer phase is calculated as:

Dimmer Phase

CROSS

PERIOD

(9.1)

The calculated dimmer phase is used to generate the signal

DRATIO, which determines LED current. If the dimmer phase

is less than 0.14 then the DRATIO is clamped at 0.14; if the

dimmer phase is greater than 0.7 then DRATIO is clamped at

1.0; otherwise DRATIO is calculated by equation 9.2.

Dimmer Phase

RATIO

×−

(9.2)

Where, K1 is set to 1.768 and K2 is set to 0.238.

Using VIsense(NOM) to represent the nominal 100% LED

current, the VIsense, which modulates the output LED current,

is controlled by:

()

Isense

Isense NOM

RATIO

(9.3)

When DRATIO is 1, the converter outputs 100% of nominal

power to the LED. If DRATIO is 0.01, the converter outputs 1%

of nominal power to the LED.

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