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TUSB320 Datasheet(PDF) 26 Page - Texas Instruments |
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TUSB320 Datasheet(HTML) 26 Page - Texas Instruments |
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26 / 35 page ![]() 26 TUSB320, TUSB320I SLLSEN9C – MAY 2015 – REVISED SEPTEMBER 2016 www.ti.com Product Folder Links: TUSB320 TUSB320I Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated 8.3 Initialization Set Up The general power-up sequence for the TUSB320 device (EN_N tied to ground) is as follows: 1. System is powered off (device has no VDD). The TUSB320 device is configured internally in UFP mode with Rds on CC pins (dead battery). 2. VDD ramps – POR circuit. VDD must ramp within 25 ms or less. IO pull-up power rail (i.e. pull up on ID, INT, SCL, SDA, ADDR, PORT) must ramp with VDD or lag after VDD. 3. I2C supply ramps up. 4. The TUSB320 device enters unattached mode and determines the voltage level from the PORT pin. This determines the mode in which the TUSB320 device operates (DFP, UFP, DRP). 5. The TUSB320 device monitors the CC pins as a DFP and VBUS for attach as a UFP. 6. The TUSB320 device enters active mode when attach has been successfully detected. 9 Power Supply Recommendations The TUSB320 device has a wide power supply range from 2.7 to 5 V. The TUSB320 device can be run off of a system power such as a battery. 10 Layout 10.1 Layout Guidelines 1. An extra trace (or stub) is created when connecting between more than two points. A trace connecting pin A6 to pin B6 will create a stub because the trace also has to go to the USB Host. Ensure that: – A stub created by short on pin A6 (DP) and pin B6 (DP) at Type-C receptacle does not exceed 3.5 mm. – A stub created by short on pin A7 (DM) and pin B7 (DM) at Type-C receptacle does not exceed 3.5 mm. 2. A 100-nF capacitor should be placed as close as possible to the TUSB320 VDD pin. 10.2 Layout Example Figure 16. TUSB320 Layout |
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