TUSB320 datasheet(14/35 Pages) TI1

14 / 35 page

TUSB320, TUSB320I

SLLSEN9C – MAY 2015 – REVISED SEPTEMBER 2016

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7.4 Programming

For further programmability, the TUSB320 device can be controlled using I2C. The TUSB320 device local I2C

interface is available for reading/writing after TI2C_EN when the device is powered up. The SCL and SDA terminals

are used for I2C clock and I2C data respectively. If I2C is the preferred method of control, the ADDR pin must be

set accordingly.

Table 5. TUSB320 I2C Addresses

TUSB320 I2C Target Address

ADDR pin

Bit 7 (MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0 (W/R)

0/1

The following procedure should be followed to write to TUSB320 I2C registers:

1. The master initiates a write operation by generating a start condition (S), followed by the TUSB320 7-bit

address and a zero-value R/W bit to indicate a write cycle

2. The TUSB320 device acknowledges the address cycle

3. The master presents the sub-address (I2C register within the TUSB320 device) to be written, consisting of

one byte of data, MSB-first

4. The TUSB320 device acknowledges the sub-address cycle

5. The master presents the first byte of data to be written to the I2C register

6. The TUSB320 device acknowledges the byte transfer

7. The master may continue presenting additional bytes of data to be written, with each byte transfer completing

with an acknowledge from the TUSB320 device

8. The master terminates the write operation by generating a stop condition (P)

The following procedure should be followed to read the TUSB320 I2C registers:

1. The master initiates a read operation by generating a start condition (S), followed by the TUSB320 7-bit

address and a one-value R/W bit to indicate a read cycle

2. The TUSB320 device acknowledges the address cycle

3. The TUSB320 device transmits the contents of the memory registers MSB-first starting at register 00h or last

read sub-address+1. If a write to the T I2C register occurred prior to the read, then the TUSB320 device

starts at the sub-address specified in the write.

4. The TUSB320 device waits for either an acknowledge (ACK) or a not-acknowledge (NACK) from the master

after each byte transfer; the I2C master acknowledges reception of each data byte transfer

5. If an ACK is received, the TUSB320 device transmits the next byte of data

6. The master terminates the read operation by generating a stop condition (P)

The following procedure should be followed for setting a starting sub-address for I2C reads:

1. The master initiates a write operation by generating a start condition (S), followed by the TUSB320 7-bit

address and a zero-value R/W bit to indicate a read cycle

2. The TUSB320 device acknowledges the address cycle

3. The master presents the sub-address (I2C register within the TUSB320 device) to be read, consisting of one

byte of data, MSB-first

4. The TUSB320 device acknowledges the sub-address cycle

5. The master terminates the read operation by generating a stop condition (P)

NOTE

If no sub-addressing is included for the read procedure, then the reads start at register

offset 00h and continue byte-by-byte through the registers until the I2C master terminates

the read operation. If a I2C address write occurred prior to the read, then the reads start at

the sub-address specified by the address write.

TUSB320 Datasheet(PDF) 14 Page - Texas Instruments

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