DS1100SDC Data Sheet

Control and Status Signals

Input Signals

PSON_L

Active LOW signal which enables/disables the main output. Pulling this signal LOW will turn-on the main output. Recommended pull-up resistor

to 12 VSB is 8.2 k with a 3.0 k pull-down to ground. A 100 pF decoupling capacitor is also recommended.

MIN

MAX

V

IL

Input logic level LOW

0.8 V

V

IH

Input logic level HIGH

2.0 V

5.0 V

I

SOURCE

Current that may be sourced by this pin

2 mA

I

SINK

Current that may be sunk by this pin at low state

0.5 mA

PSKILL_L

First break/last mate active LOW signal which enables/disables the main output. This signal will have to be pulled to ground at the system side

with a 220 ohm resistor. A 100 pF decoupling capacitor is also recommended.

MIN

MAX

V

IL

Input logic level LOW

0.8 V

V

IH

Input logic level HIGH

2.0 V

5.0 V

I

SOURCE

Current that may be sourced by this pin

2 mA

I

SINK

Current that may be sunk by this pin at low state

0.5 mA

Output Signals

INPUT_OK

Signal used to indicate the presence of DC input to the power supply. A logic level HIGH will indicate that the DC input to the power supply is

within the operating range while a logic level LOW will indicate that DC input has been lost.

This is an open collector/drain output. This pin is pulled high by a 1.0 kohm resistor connected to 3.3 V inside the power supply. It is recom-

mended that this pin be connected to a 100 pF decoupling capacitor and pulled down by a 100 kohm resistor.

MIN

MAX

V

IL

Input logic level LOW

0.6 V

V

IH

Input logic level HIGH

2.0 V

5.0 V

I

SOURCE

Current that may be sourced by this pin

3.3 mA

I

SINK

Current that may be sunk by this pin at low state

0.7 mA

PWR_GOOD / PWOK

Signal used to indicate that main output voltage is within regulation range. The PWR_GOOD signal will be driven HIGH when the output voltage is

valid and will be driven LOW when the output falls below the under-voltage threshold.

This signal also gives an advance warning when there is an impending power loss due to loss of DC input or system shutdown request. More details in

the Timing Section.

This is an open collector/drain output. This pin is pulled high by a 1.0 kohm resistor connected to 3.3 V inside the power supply. It is recom-

mended that this pin be connected to a 100 pF decoupling capacitor and pulled down by a 10 kohm resistor.

MIN

MAX

V

IL

Input logic level LOW

0.8 V

V

IH

Input logic level HIGH

2.0 V

5.0 V

I

SOURCE

Current that may be sourced by this pin

3.3 mA

I

SINK

Current that may be sunk by this pin at low state

0.7 mA