MRF39RA datasheet(49/72 Pages) MICROCHIP

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DS40001778B-page 49

MRF39RA

5.4

IRQ and Pin Mapping Registers

TABLE 5-4:

IRQ AND PIN MAPPING REGISTERS

Name

(Address)

Bits

Variable Name

Mode

Default

Value

Description

RegDioMapping1

(0x25)

7-6

Dio0Mapping

Mapping of pins DIO0 to DIO5

See Table 4-2 for mapping in Continuous mode

See Table 4-3 for mapping in Packet mode

5-4

Dio1Mapping

3-2

Dio2Mapping

1-0

Dio3Mapping

RegDioMapping2

(0x26)

7-6

Dio4Mapping

5-4

Dio5Mapping

3—

Unused

2-0

ClkOut

111*

Selects CLKOUT frequency:

000  FXOSC

001  FXOSC/2

010  FXOSC/4

011  FXOSC/8

100  FXOSC/16

101  FXOSC/32

110  RC (automatically enabled)

111  OFF

RegIrqFlags1

(0x27)

ModeReady

Set when the operation mode requested in

Mode, is ready

- Sleep: Entering Sleep mode

- Standby: XO is running

- FS: PLL is locked

- Rx: RSSI sampling starts

Cleared when changing operating mode.

RxReady

Set in Rx mode, after RSSI, AGC and AFC.

Cleared when leaving Rx.

5—

Unused

PllLock

Set (in FS and Rx) when the PLL is locked.

Cleared when it is not.

Rssi

rwc

Set in Rx when the RssiValue exceeds

RssiThreshold.

Cleared when leaving Rx.

Timeout

Set when a time-out occurs (see TimeoutRxStart

and TimeoutRssiThresh)

Cleared when leaving Rx or FIFO is emptied.

AutoMode

Set when entering Intermediate mode.

Cleared when exiting Intermediate mode.

Note that in Sleep mode a small delay can be

observed between AutoMode interrupt and the

corresponding Enter/Exit condition.

SyncAddressMatch

r/rwc

Set when sync and address (if enabled) are

detected.

Cleared when leaving Rx or FIFO is emptied.

This bit is read-only in Packet mode, rwc in

Continuous mode.

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