Philips Semiconductors

Product data

SA2411

+20 dBm single chip linear amplifier for WLAN

2003 Feb 07

4

6. FUNCTIONAL DESCRIPTION

The main building-blocks are:

Input

The device has differential inputs so a balun is needed in the case of single ended operation, input impedance is approximately 75

Ω + 25j Ω,

transceiver chip.

Amplifier

currents reduces the gain. This allows trade-offs to be made among gain, linearity and current.

Output matching

The output of the amplifier is matched, on chip, for a 50

Ω load. The matching includes the supply feed for the power amplifier. The pin

Power detector

The power detector detects the power level and transforms it into a low frequency current. The detector output must be loaded with a resistor to

ground for the highest accuracy. This resistor has an optimal value of 5.6 k

Ω. Lower values can be used to comply with maximum input

sensitivity of ADCs, at the cost of dynamic range. The maximum voltage detected is 2.3 V.

Power mode

This pin selects the desired gain and linearity level (13 dB or 14.5 dB gain). The low gain is more applicable to high voltage applications from

3.3 V to 3.6 V. The high gain is more applicable to low voltage applications lower than 3.3 V.

NOTE:

In order to assure optimal thermal performance, it is recommended that all ground pins be connected, and that the number of vias to ground

under the chip be maximized. In addition, the use of solder mask under the chip (for scratch protection) is not recommended.