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MICRF229 Datasheet(PDF) 14 Page - Micrel Semiconductor

Part # MICRF229
Description  400MHz to 450MHz ASK/OOK Receiver with Auto-Poll and RSSI
PDF  23 Pages
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

MICRF229 Datasheet(HTML) 14 Page - Micrel Semiconductor

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Micrel, Inc.
MICRF229
April 15, 2015
14
Revision 1.0
The auto-polling feature is noise sensitive in that if the
noise level is sufficiently high, the MICRF229 could be
awaken in the absence of valid RF signal due to its
internal noise. To ensure that the device only wakes up
upon the reception of valid data, increase the number of
valid bits in the bit check register D[8:7] setting. The
recommend setting is 11.
Table 6. Sleep Timer Control
D14
D13
D12
Set Sleep Time
0
0
0
10ms
0
0
1
20ms
0
1
0
40ms Default
0
1
1
80ms
1
0
0
160ms
1
0
1
320ms
1
1
0
640ms
1
1
1
1280ms
Table 7. Sleep Auto-Poll Control
D15
Auto-Poll Enable
0
Awake – does not poll - default
1
Auto-polls with sleep periods
Table 8. Sleep Auto-Poll Control for 433.92MH
D11
D10
D9
Set Bit-Check Window Time
(433.92MHz, Time In
μs)
D4 = 1
D3 = 1
D4 = 1
D3 = 0
D4 = 0
D3 = 1
D4 = 0
D3 = 0
0
0
0
71
143
285
570
0
0
1
67
133
266
532
0
1
0
62
124
247
494
0
1
1
57
114
228
457
1
0
0
52
105
209
419
1
0
1
48
95
190
381
1
1
0
43
86
172
343
1
1
1
38
76
152
305
Note:
Default value of D{11:9} = 111.
Table 9. Number of Valid Bit Control
D8
D7
Set Number of Consecutive Valid
Bits Before Releasing DO
0
0
Bitcheck 0 bits - default
0
1
Bitcheck 2 bits
1
0
Bitcheck 4 bits
1
1
Bitcheck 8 bits
Serial Interface Register Programming
There are twenty register bits in the MICRF229. Bits D15
− D19 have specific set points:
• D15: Default = 0; set to 1 only when auto-poll is in use.
• D16: Default = 0; set to 1 only when high bandwidth is
in use.
• D17: Default = 0 for normal operation.
• D18: This bit must always be set to 1.
• D19: For normal application, always set this bit to 0.
All other register bits must be set according to the
specific application as detailed in the previous sections.
Programming the device is accomplished by the use of
DO and SCLK. Normally, DO is outputting data and
needs to switch to an input pin made by the start
sequence, as shown at Figure 7.
High at the SCLK pin tri-states the DO pin, enabling the
external drive into the DO pin with an initial low level. The
start sequence is completed by taking SCLK low, then
high while DO is low, followed by taking DO high, then
low while SCLK is high. The serial interface is initialized
and ready to receive the programming data.
SCLK frequency should be greater than 5kHz to avoid
automatic reset from internal circuitry.
Figure 7. Serial Interface Start Sequence



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