82P33741 datasheet(39/61 Pages) IDT

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Revision 6, July 21, 2016

82P33741 Datasheet

8.3.2

LVPECL / LVDS INPUT / OUTPUT PORT

8.3.2.1

PECL Input Port

Figure 16. Recommended PECL Input Port Line Termination

IN_POS

IN_NEG

1 PPS

650 MHz

(transmission line)

VDD (+ 3.3 V)

130

GND

VDD (+ 3.3 V)

130

GND

(transmission line)



Table 25: LVPECL Input Port Electrical Characteristics

Parameter

Description

Min

Typ

Max

Unit

Test Condition

VIL

Input Low Voltage, Differential Inputs

VDD - 2.5

VDD - 1.5

VDD - 0.5

VIH

Input High Voltage, Differential Inputs

VDD - 2.4

VDD - 1.4

VDD - 0.4

VID

Input Differential Voltage

0.1

0.7

1.4

VIL_S

Input Low Voltage, Single-ended Input

VSS

VDD - 1.95

VDD - 1.5

VIH_S

Input High Voltage, Single-ended Input

VDD - 1.3

VDD - 0.9

VDD

IIH

Input High Current, Input Differential Voltage VID = 1.4 V

A

IIL

Input Low Current, Input Differential Voltage VID = 1.4 V

-10

A

Note:

1. Assuming a differential input voltage of at least 100 mV.

2. Unused differential input terminated to VDD-1.4 V.

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