UCS81003 datasheet(43/108 Pages) MICROCHIP

43 / 108 page

 2014 Microchip Technology Inc.

DS20005334A-page 43

UCS81003

9.10

No Handshake

In DCE Cycle mode with emulation retry disabled, a

No Handshake condition is flagged (the NO_HS status

bit stays set (see Register 10-5) when the end of the

DCE Cycle is reached without a handshake and

without drawing current.

All signatures/handshaking placed on the DPOUT and

DMOUT pins are removed. The UCS81003 will operate

with the high-speed switch opened or closed as

determined by the high-speed switch configuration,

and will use Trip or Constant Current Limiting, as

determined

the

IBUS_R2MIN

setting

(CS_R2_IMIN<2:0> bits 4-2 in the Custom Current

Limiting Behavior Configuration register 51h).

The portable devices that can cause this are generally

the ones that pull up DPOUT to some voltage and leave

it there, or apply the wrong voltage.

9.11

Preloaded Charger

Emulation Profiles

The following charger emulation profiles are resident to

the UCS81003:

• Legacy 1 Charger Emulation Profile

• Legacy 2, 4, 5 and 7 Charger Emulation Profiles

• Legacy 3 Charger Emulation Profile

• Legacy 6 Charger Emulation Profile

• BC1.2 CDP Charger Emulation Profile

• BC1.2 DCP Charger Emulation Profile

9.11.1

LEGACY 1 CHARGER

EMULATION PROFILE

Legacy 1 Charger Emulation Profile does the following:

The UCS81003 will apply 900 mV to both the

DPOUT and the DMOUT pins.

VBUS voltage is applied.

If the portable device draws more than IBUS_CHG

current when the tEM_TIMEOUT timer expires, the

UCS81003 will accept that the currently applied

profile is the correct charger emulation profile for

the

attached

portable

device.

Charging

commences. The voltages applied to the DPOUT

and DMOUT pins will remain in place (unless

EM_RESP is set to 0b). The UCS81003 will

begin operating in Trip mode or CC mode as

determined by the IBUS_R2MIN setting (see

Section 10.14 “Current Limiting Behavior

Configuration Registers”).

If the portable device does not draw more than

IBUS_CHG current when tEM_TIMEOUT timer

expires, the UCS81003 will stop the currently

applied charger emulation profile. This will

cause all voltages put onto the DPOUT and

DMOUT pins to be removed. Emulation reset

occurs, and the UCS81003 will initiate the next

charger emulation profile.

9.11.2

LEGACY 2, 4, 5 AND 7 CHARGER

EMULATION PROFILES

Legacy 2, 4, 5 and 7 Charger Emulation Profiles follow

the same pattern of operation, although the voltage that

is applied on the DPOUT and DMOUT pins will vary. They

do the following:

The UCS81003 will apply a voltage on the

DPOUT pin using either a current-limited voltage

source or a voltage divider between VBUS and

ground with the center tap on the DPOUT pin.

The UCS81003 will apply a possibly different

voltage on the DMOUT pin, using either a current-

limited voltage source or a voltage divider

between VBUS and ground, with the center tap

on the DMOUT pin.

VBUS voltage is applied.

Legacy 3 charger emulation profile accepted or the

emulation timeout is disabled

CC mode if ILIM < 1.68A, otherwise, Trip mode

Legacy 1, Legacy 2 or Legacy 4 - Legacy 7 charger

emulation profile accepted or the emulation timeout is

disabled

Trip mode if IBUS_R2MIN < ILIM or ILIM > 1.68A (normal

operation), otherwise, CC mode (see Register 10-49)

Custom charger emulation profile accepted or the

emulation timeout is disabled

Trip mode if IBUS_R2MIN < ILIM or ILIM > 1.68A (normal

operation), otherwise, CC mode (see Register 10-49)

No handshake

(DCE Cycle with Emulation Retry not enabled)

Trip mode if IBUS_R2MIN < ILIM or ILIM > 1.68A (normal

operation), otherwise, CC mode (see Register 10-49)

TABLE 9-2:

CURRENT LIMIT MODE OPTIONS (CONTINUED)

Active Mode

Current Limit Mode

(See Section 10.14 “Current Limiting Behavior

Configuration Registers”)

Note 1:

As noted in the last three rows in Table 9-2, under those specific conditions with ILIM < 1.68A, it is the

relationship of ILIM and IBUS_R2MIN that determines the current limiting mode. In these cases, the value of

IBUS_R2MIN is determined by CS_R2_IMIN<2:0> bits 4-2 in the Custom Current Limiting Behavior

Configuration register - 51h (Register 10-49).

UCS81003 Datasheet(PDF) 43 Page - Microchip Technology

UCS81003 Datasheet(HTML) 43 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL