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RTL8208 Datasheet(PDF) 7 Page - List of Unclassifed Manufacturers |
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RTL8208 Datasheet(HTML) 7 Page - List of Unclassifed Manufacturers |
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7 / 40 page ![]() RTL8208 2001/01/07 7 Rev.1.923 5.3 Miscellaneous Pins Pin Name Pin Type Description RESET# 47 I, (Pu) Reset: This is an active low input. To complete the reset function, this pin must be asserted low for at least 10ms. X1 114 I 25MHz Crystal X1 or 25MHz Oscillator clock input: When X1 is pulled low, X2 must be floating. REFCLK will then be the chip clock input. X2 115 O 25MHz Crystal X2 REFCLK 48 I/O Reference clock: If X1 is 25MHz active, REFCLK is a 50MHz output. If X1 is pulled-low (disabled), REFCLK is the clock input as below: 50MHz 100ppm clock input for RMII mode. 125MHz 100ppm clock input for SMII/SS-SMII mode. IBREF 118 A Reference Bias Resistor: This pin must be tied to analog ground through an external 1.96K Ω resistor when using a 1:1 transformer on Tx/Rx. VCTRL 116 O Voltage control: This pin controls a PNP transistor to generate the 2.5V power supply for VDD and VDDAL pins. |
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