CAT5409

http://onsemi.com

3

PIN DESCRIPTIONS

Table 1. PIN DESCRIPTIONS

Pin#

(TSSOP)

Pin#

(SOIC)

Name

Function

19

1

Supply Voltage

20

2

Low Reference Terminal

for Potentiometer 0

21

3

High Reference Terminal

for Potentiometer 0

22

4

Wiper Terminal for

Potentiometer 0

23

5

A2

Device Address

24

6

WP

Write Protection

1

7

SDA

Serial Data Input/Output

2

8

A1

Device Address

3

9

Low Reference Terminal

for Potentiometer 1

4

10

High Reference Terminal

for Potentiometer 1

5

11

Wiper Terminal for

Potentiometer 1

6

12

GND

Ground

7

13

NC

No Connect

8

14

Wiper Terminal for

Potentiometer 2

9

15

High Reference Terminal

for Potentiometer 2

10

16

Low Reference Terminal

for Potentiometer 2

11

17

SCL

Bus Serial Clock

12

18

A3

Device Address

13

19

NC

No Connect

14

20

A0

Device Address, LSB

15

21

Wiper Terminal for

Potentiometer 3

16

22

High Reference Terminal

for Potentiometer 3

17

23

Low Reference Terminal

for Potentiometer 3

18

24

NC

No Connect

SCL: Serial Clock

The CAT5409 serial clock input pin is used to clock all

data transfers into or out of the device.

SDA: Serial Data

The CAT5409 bidirectional serial data pin is used to

transfer data into and out of the device. The SDA pin is an

open drain output and can be wire-Ored with the other open

drain or open collector outputs.

A0, A1, A2, A3: Device Address Inputs

These inputs set the device address when addressing

multiple devices. A total of sixteen devices can be addressed

on a single bus. A match in the slave address must be made

with the address input in order to initiate communication

with the CAT5409.

terminal connections on a mechanical potentiometer.

a mechanical potentiometer.

WP: Write Protect Input

The WP pin when tied low prevents non-volatile writes to

the data registers (change of wiper control register is

allowed) and when tied high or left floating normal

read/write operations are allowed. See Write Protection on

page 8 for more details.

DEVICE OPERATION

serial interface logic, four 6-bit wiper control registers and

sixteen 6-bit, non-volatile memory data registers. Each

resistor array contains 63 separate resistive elements

connected in series. The physical ends of each array are

equivalent to the fixed terminals of a mechanical

may be interchanged. The tap positions between and at the

ends of the series resistors are connected to the output wiper

point for each potentiometer is connected to its wiper

terminal at a time and is determined by the value of the wiper

control register. Data can be read or written to the wiper

control registers or the non-volatile memory data registers

transferred between the wiper control registers and each

respective potentiometer’s non-volatile data registers. Also,

the device can be instructed to operate in an “increment/

decrement” mode.