CAT5419

http://onsemi.com

2

Figure 1. Functional Diagram

SDA

SCL

A0

A1

A2

A3

NONVOLATILE

DATA

REGISTERS

WIPER

CONTROL

REGISTERS

CONTROL

LOGIC

2−WIRE BUS

INTERFACE

WP

PIN DESCRIPTIONS

SCL: Serial Clock

The CAT5419 serial clock input pin is used to clock all

data transfers into or out of the device.

SDA: Serial Data

The CAT5419 bidirectional serial data pin is used to

transfer data into and out of the device. The SDA pin is an

open drain output and can be wire-OR’d with the other open

drain or open collector outputs.

A0, A1, A2, A3: Device Address Inputs

These inputs set the device address when addressing

multiple devices. A total of sixteen devices can be addressed

on a single bus. A match in the slave address must be made

with the address input in order to initiate communication

with the CAT5419.

connections on a mechanical potentiometer.

mechanical potentiometer.

WP: Write Protect Input

The WP pin when tied low prevents non-volatile writes to

the data registers (change of wiper control register is

allowed) and when tied high or left floating normal

read/write operations are allowed. See page 8, Write

Protection for more details.

Table 1. PIN CONNECTIONS

Pin

SOIC

Pin

TSSOP

Name

Function

1

19

Supply Voltage

2

20

Low Reference Terminal

for Potentiometer 0

3

21

High Reference Terminal

for Potentiometer 0

4

22

Wiper Terminal for

Potentiometer 0

5

23

A2

Device Address

6

24

WP

Write Protection

7

1

SDA

Serial Data Input/Output

8

2

A1

Device Address

9

3

Low Reference Terminal

for Potentiometer 1

10

4

High Reference Terminal

for Potentiometer 1

11

5

Wiper Terminal for

Potentiometer 1

12

6

GND

Ground

13

7

NC

No Connect

14

8

NC

No Connect

15

9

NC

No Connect

16

10

NC

No Connect

17

11

SCL

Bus Serial Clock

18

12

A3

Device Address

19

13

NC

No Connect

20

14

A0

Device Address, LSB

21

15

NC

No Connect

22

16

NC

No Connect

23

17

NC

No Connect

24

18

NC

No Connect