Technical Data

Reset Circuits with Manual Reset Input

Data Sheet N1594 Rev. -

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SSR811/SSR812

Detail Descriptions of Technical Terms

RESET OUTPUT

μP will be activated at a valid reset state. These μP supervisory circuits assert reset to prevent code

execution errors during power-up, power-down, or brownout conditions.

RESET

———————

is guaranteed to be a logic low for V

TH

>VCC>0.9V. Once VCC exceeds the reset threshold, an

internal timer keeps RESET

———————

low for the reset timeout period; after this interval, RESET

———————

goes high.

If a brownout condition occurs (VCC drops below the reset threshold), RESET

———————

goes low. Any time VCC goes

below the reset threshold, the internal timer resets to zero, and RESET

———————

goes low. The internal timer is

activated after VCC returns above the reset threshold, and RESET

———————

remains low for the reset timeout period.

The manual reset input (MR

———

) can also initiate a reset. SSR812 has an active-high RESET output that is the

inverse of SSR811’s RESET

———————

output.

MANUAL RESET INPUT

Many μP-based products require manual reset capability, allowing operators, test technicians, or external logic

circuitry to initiate a reset. Logic low on MR

———

asserts reset. Reset will remain asserted for the Reset Active

Timeout Period (t

RP

) after MR

———

returns high. This input has an internal 20KΩ pull-up resistor, so it can be

floating if it is not used. MR

———

can be driven with TTL or CMOS-logic levels, or with open-drain/collector outputs.

Another alternative is to connect a normal switch from MR

———

to GND to create a manual reset function.

Connecting a 0.1μF capacitor from MR

———

to ground can provide noise immunity to prevent noise caused by long

cables of MR

———

or noisy environment.

BENEFITS OF HIGHLY ACCURATE RESET THRESHOLD

SSR811/SSR812 with specified voltage as 5V±10% or 3V±10% are ideal for systems using a 5V±5% or

3V±5% power supply. The reset is guaranteed to assert after the power supply falls out of regulation, but

before power drops below the minimum specified operating voltage range of the system ICs. The pre-trimmed

thresholds are reducing the range over which an undesirable reset may occur.