Technical Data

Reset Circuits with Manual Reset Input

Data Sheet N1594 Rev. -

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SSR811/SSR812

Application Information

NEGATIVE-GOING VCC TRANSIENTS

In addition to issuing a reset to the μP during power-up, power-down, and brownout conditions, SSR811 series

are relatively resistant to short-duration negative-going VCC transient.

ENSURING A VALID RESET OUTPUT DOWN TO VCC=0

When VCC falls below 0.9V, SSR811 RESET

———————

output no longer sinks current; it becomes an open circuit. In

this case, high-impedance CMOS logic inputs connecting to RESET

———————

can drift to undetermined voltages.

Therefore, SSR811/SSR812 with CMOS is perfect for most applications of VCC below 0.9V. However in

applications where RESET

———————

must be valid down to 0V, adding a pull-down resistor to RESET

———————

causes any

leakage currents to flow to ground, holding RESET

———————

low.

INTERFACING TO μP WITH BIDIRECTIONAL RESET PINS

μPs with bidirectional reset pins can contend with SSR811/812 reset outputs. If SSR811 RESET

———————

output is

asserted high and the μP wants to pull it low, indeterminate logic levels may occur. To correct such cases,

connect a resistor between SSR811 RESET

———————

(or SSR812 RESET

———————

) output and the μP reset I/O. Buffer the

reset output to other system components.