FET Selection

Switching Section — The selection of FET switches affects

both the efficiency of the whole converter and the current

limit setting (if V

ciency standpoint it is suggested that for the high-side

switch, only logic level FETs be used. Standard FETs can be

used for the low-side switch when 12V is used to power the

V

DD

pin. The power loss associated with the FETs is

two-fold — Ohmic loss and switching loss. The Ohmic loss is

relatively easy to calculate whereas the switching loss is

much more difficult to estimate. The switching loss in a syn-

chronous buck converter usually happens only in the

high-side FET. When the high-side FET starts to turn on, in-

ductor current is flowing in the low-side body diode. Since

the body diode undergoes a reverse recovery before forced

off, the high-side FET will experience a pulse of drain current

turn on. The simultaneous presence of high drain-source

voltage and high drain current in the high-side FET causes

the switching loss. Apparently the switching loss is propor-

tional to the PWM frequency. Having a Schottky diode in par-

allel with the low-side body diode will to a large extent allevi-

ate the problem. This is because a Schottky diode does not

undergo a reverse recovery and it has a lower forward volt-

age than the body diode so it will take the majority of the in-

ductor current after the low-side FET is turned off. The

low-side FET benefits from what is called zero voltage

switching (ZVS). That is because every time just before the

low-side FET is turned on, inductor current is already flowing

in its body diode, resulting in a low drain-source voltage.

When the low-side FET is turned off, current will be shifted to

its body diode temporarily, again clamping the drain-source

voltage to a low value.

It is difficult to calculate the switching loss due to its compli-

cated nature. Fortunately at a reasonable PWM frequency

such as 300 kHz, the switching loss is usually much less

than the Ohmic loss. So the designer may initially ignore the

switching loss when trying to meet an efficiency specifica-

tion.

The Ohmic loss for the high-side FET is:

(12)

The Ohmic loss for the low-side FET is:

(13)

Notice when determining the r

ages are usually different for the two FET’s. For the

high-side FET, V

low-side, V

present a lower r

for both switches.

Since the r

actual Ohmic loss may be somewhat higher than calculated.

The power supply designer may target 125˚C FET operating

temperature under maximum load and highest ambient tem-

perature and then use the corresponding r

FET datasheet.

Linear Section — Two things need to be considered, i.e.,

r

possible r

input-output differential voltage divided by maximum load

current. In a typical motherboard 3.3V to 1.5V or 3.3V to

2.5V application, this is not an issue because the maximum

allowable r

thermal capacity and cost that limits the selection. As an ex-

ample, consider a 3.3V to 1.5V, 4A application. The lowest

input-output differential voltage is 3.3V x 95% –1.5V x 102%

= 1.605V, so the maximum allowable r

= 401 m

Ω. Almost all low voltage discrete N-FET’s can meet

this requirement. However, the maximum power dissipation

on the FET is (3.3V x 105% –1.5V x 98%)x4A = 8W. At

least a TO-220 package with a beefy heat sink is necessary

to handle the thermal dissipation. When there is a load tran-

sient requirement such as that of the GTL+ supply, make

sure the r

steady state operation because headroom is important for

transient performance.

Capacitor Selection

Switching Section —

Output Capacitors. The selection of capacitors is an ex-

tremely important step when designing a converter for a load

such as the MPU core. Since the typical slew rate of the load

current during a large load transient is around 20 A/µs to 30

A/µs, the switching converter has to rely on the output ca-

pacitors to take care of the first few microseconds. Under

such a current slew rate, ESR of the output capacitors is

more of a concern than the ESL in terms of voltage excur-

sion. Depending on the kind of capacitors being used, total

output capacitance value may or may not be an important

factor. When the output capacitance is too low, the converter

may have to have a small output inductor to quickly supply

current to the output capacitors when the load suddenly

kicks in and to quickly stop supplying current when the load

is suddenly removed. Multilayer ceramic (MLC) capacitors

can have very low ESR but also a low capacitance value

compared to other kinds of capacitors. Low ESR aluminum

electrolytic capacitors tend to have large sizes and capaci-

tance. Tantalum electrolytic capacitors can have a fairly low

ESR with a much smaller size and capacitance than the alu-

minum capacitors. Certain OSCON capacitors present ultra

low ESR and long life span. By the time the total ESR of the

output capacitor bank reaches around 9 m

Ω, the capaci-

tance of the aluminum/tantalum/OSCON capacitors is usu-

ally already in the millifarad range. For those capacitors,

ESR is the only factor to consider. MLCs can have the same

amount of total ESR with much less capacitance, most prob-

ably under 100 µF. A very small inductor, ultra fast control

loop and a high switching frequency become necessary in

such a case to deal with the fast charging/discharging rate of

the output capacitor bank.

From a cost savings standpoint, aluminum electrolytic ca-

pacitors are the most popular choice for output capacitors.

They have reasonably long life span and they tend to have

hugh capacitance to withstand the charging or discharging

process during a load transient for a fairly long period. Sanyo

MV-GX and MV-DX series’ give good performance when

enough of the capacitors are paralleled. The 6MV1500GX

capacitor has a typical ESR of 44 m

Ω and a capacitance of

1500 µF at a voltage rating of 6.3V. For a detailed procedure

for determining number of output capacitors, refer to the ap-

plication note

Using Dynamic Voltage Positioning Technique

to Reduce the Cost of Output Capacitors in Advanced Micro-

processor Power Supplies and the associated spreadsheet

for automated design.

Input Capacitors. The challenge on input capacitors is the

RMS ripple current. The large ripple current drawn by the

high-side switch tends to generate quite some heat due to

the capacitor ESR. The RMS ripple current ratings in the ca-

pacitor catalogs are usually specified under 105˚C. In the

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