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VSC870 Datasheet(PDF) 12 Page - Vitesse Semiconductor Corporation |
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VSC870 Datasheet(HTML) 12 Page - Vitesse Semiconductor Corporation |
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12 / 40 page ![]() VITESSE SEMICONDUCTOR CORPORATION Data Sheet VSC870 High Performance Serial Backplane Transceiver Page 12 G52190-0, Rev 4.1 01/05/01 © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com Internet: www.vitesse.com 2.0 Packet Mode 2.1 Overview In Packet Mode the BYPASS signal is set LOW to allow the transceiver to utilize the built-in retransmission, camp-on, virtual output queue and delayed read enable logic. In addition, the signal CELLSYN is held LOW to disable the cell synchronization process. A special command word can be sent through the transceiver to the switch chip requesting connection to one or multiple output ports. Acknowledge (ACK) information will be returned to the transceiver from the switch allowing the port card to start transmitting data (see Application Note 31: Design Guide for a Packet Based Switch with Distributed Control). This special command word, a Connection Request (CRQ) Command, can be put on the front of the data packet to make the packet self routing. In this mode of operation, no controller chip needs to be connected to the switch chip as the switch chip handles all arbitration for connection requests (see the VSC880 data sheet). If the system designer wants to bypass the features described in this section, the signal BYPASS can be set HIGH. The user will then have direct control of the data stream between the transceiver and the switch. A picture of a Packet Mode system is shown below. The minimum packet size in this mode of operation is 4 words or 16 bytes. Figure 1: Packet Mode System 2.2 Data Encoding Format The data and command words are described in section 1.0. In this section the Connection Request (CRQ) word format at 4 interfaces (transceiver parallel transmit port, serial line to switch, serial line from switch and transceiver parallel receive port) is described. In this mode the TXTYP[1:0] and RXTYP[1:0] bits are encoded differently than the overhead bits (B[1:0]) to effectively support a variety of features in the Packet Mode. The encoding for these data types are described in the following section. Port Card Trans RXFIFO TXFIFO Port Card Trans RXFIFO TXFIFO Switch Chip Switch Card VSC870 VSC870 VSC880 |
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