PIN

NAME

FUNCTION

1

REF

Internal Reference Bypass. Bypass to GND in close proximity with a X5R or X7R 10μF 16V capacitor. See

the Layout, Grounding, and Bypassing section.

2

one 10µF capacitor per board.

3

AIN+

Positive Analog Input

4

AIN-

Negative Analog Input. Connect AIN- to the analog ground plane or to a remote sense ground.

5

GND

Power-Supply Ground

6

CNVST

Conversion Start Input. The rising edge of CNVST initiates the conversions and selects the interface mode:

daisy-chain or CS. In CS mode, either SDI or CNVST can enable the serial output signals when low. If SDI or

CNVST is low when the conversion is completed, the busy indicator feature is enabled..

7

SDO

Serial Data Output. SDO transitions on the falling edge of SCLK.

8

SCLK

Serial Clock Input. Clocks data out of the serial interface when the device is selected.

9

SDI

Serial Data Input and Mode Select Input. Daisy-chain mode is selected if SDI is low during the CNVST rising

edge. In this mode, SDI is used as a data input to daisy-chain the conversion results of two or more ADCs

onto a single SDO line. CS mode is selected if SDI is high during the CNVST rising edge. In this mode, either

SDI or CNVST can enable the serial output signals when low. If SDI or CNVST is low when the conversion is

completed, the busy indicator feature is enabled.

10

OVDD

each device and one 10µF per board.

10

2

3

4

5

9

8

7

6

CNVST

SDO

SCLK

SDI

µMAX

TOP VIEW

+

1

OVDD

MAX11158

REF

AIN+

AIN-

GND

Pin Description

Pin Configuration

MAX11158

18-Bit, 500ksps, ±5V SAR ADC with

Internal Reference in µMAX

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