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HMC448

GaAs MMIC x2 ACTIVE FREQUENCY

MULTIPLIER, 19 - 25 GHz OUTPUT

v01.1007

General Description

Features

Functional Diagram

Typical Applications

The HMC448 is suitable for:

• Clock Generation Applications:

SONET OC-192 & SDH STM-64

• Point-to-Point & VSAT Radios

• Test Instrumentation

• Military & Space

The HMC448 die is a x2 active broadband frequ-

ency multiplier chip utilizing GaAs PHEMT technology.

When driven by a 0 dBm signal, the multiplier pro-

vides +11 dBm typical output power from 19 to 25 GHz.

The Fo and 3Fo isolations are >22 dBc up to 22 GHz.

This multi-rate frequency multiplier can be used in

the generation of a half rate clock for 40 Gbps sys-

tems or as part of a multiplier chain to generate a

full rate 40 Gbps clock. The HMC448 is also ideal

for use in LO multiplier chains for Pt to Pt & VSAT

Radios yielding reduced parts count vs. traditional

approaches. The low additive SSB Phase Noise of

-135 dBc/Hz at 100 kHz offset helps maintain good

system noise performance. All data is with the chip

in a 50 ohm test fixture connected via 0.076 x 0.0127

mm (3mil x 0.5mil) ribbon bonds of minimal length

0.31mm (<12mils).

Output Power: +11 dBm

Wide Input Power Range: -4 to +6 dBm

Fo, 3Fo Isolation: >20 dBc @ Fout= 20 GHz

100 KHz SSB Phase Noise: -135 dBc/Hz

Single Supply: 5V@ 48 mA

Die Size: 1.16 x 1.20 x 0.1 mm

Parameter

Min.

Typ.

Max.

Min.

Typ.

Max.

Units

Frequency Range, Input

9.5 - 11.0

11.0 - 12.5

GHz

Frequency Range, Output

19 - 22

22 - 25

GHz

Output Power

5

9

8

12

dBm

Fo Isolation (with respect to output level)

25

15

dBc

3Fo Isolation (with respect to output level)

25

22

dBc

Input Return Loss

9

6

dB

Output Return Loss

5

5

dB

SSB Phase Noise (100 kHz Offset)

-135

-135

dBc/Hz

Supply Current (Idd)

48

67

48

67

mA