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INA1650IPWR Datasheet(PDF) 22 Page - Texas Instruments |
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INA1650IPWR Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 39 page ![]() VMID(OUT) VMID(IN) VCC VEE 500 k 500 k CF RISO CLOAD REF A REF B Copyright © 2016, Texas Instruments Incorporated 50 55 60 65 70 75 80 85 90 95 10 100 1k 10k Frequency (Hz) F F / 1 M F F / 1 M C007 22 INA1650 SBOS818 – DECEMBER 2016 www.ti.com Product Folder Links: INA1650 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Application Information (continued) Figure 49. CMRR Degradation Due to a 5% Mismatch in AC-Coupling Capacitors 8.1.5 Supply Divider Capacitive Loading The VMID(OUT) pin of the INA1650 is stable with capacitive loads up to 150 pF. An isolation resistor (RISO in Figure 50), must be used if capacitive loads larger than 150 pF are connected to the VMID(OUT) pin. Figure 50 shows the recommended configuration of an isolation resistor in series with the capacitive load. The REF pins of the INA1650 must connect directly to the VMID(OUT) pin before the isolation resistor. Any resistance placed between the VMID(OUT) pin and the reference pins degrades the CMRR of the device. Figure 51 shows the recommended value for the isolation resistor for increasing capacitive loads. Figure 50. Place an Isolation Resistor Between the VMID(OUT) Pin and Large Capacitive Loads |
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