LAN89730 datasheet(198/218 Pages) MICROCHIP

198 / 218 page

LAN89730

DS60001348A-page 198

 2013-2015 Microchip Technology Inc.

Note 7-4

This specification applies to all inputs and tri-stated bi-directional pins. Internal pull-down and pull-up

resistors add additional drive current as detailed in the PU and PD sections of Table 7-12.

Note 7-5

This is the total 5.5 V input leakage for the entire device.

Note 7-6

XI can optionally be driven from a 25 MHz single-ended clock oscillator.

Note 7-7

This drive current is in addition to the IS or IS_5V input leakage detailed in Table 7-12, "I/O Buffer

Characteristics".

Note 7-8

Measured at line side of transformer, line replaced by 100 Ω (+/-1%) resistor.

Note 7-9

Offset from 16 ns pulse width at 50% of pulse peak.

Note 7-10

Measured differentially.

Note 7-11

Min/max. voltages guaranteed as measured with 100 Ω resistive load.

ICLK Type Buffer (XI Input)

Low Input Level

High Input Level

VILI

VIHI

0.8

0.3

Note 7-6

PU Drive Current

IPU

-30

-50

-70

µA

Note 7-7

PD Drive Current

IPD

µA

Note 7-7

TABLE 7-13:

100BASE-TX TRANSCEIVER CHARACTERISTICS

Parameter

Symbol

Min.

Typ.

Max.

Unit

Note

Peak Differential Output Voltage High

VPPH

950

1050

mVpk

Note 7-8

Peak Differential Output Voltage Low

VPPL

-950

-1050

mVpk

Note 7-8

Signal Amplitude Symmetry

VSS

102

Note 7-8

Signal Rise and Fall Time

TRF

3.0

5.0

Note 7-8

Rise and Fall Symmetry

TRFS

0.5

Note 7-8

Duty Cycle Distortion

DCD

Note 7-9

Overshoot and Undershoot

VOS

Jitter

1.4

Note 7-10

TABLE 7-14:

10BASE-T TRANSCEIVER CHARACTERISTICS

Parameter

Symbol

Min.

Typ.

Max.

Unit

Note

Transmitter Peak Differential Output Voltage

VOUT

2.2

2.5

2.8

Note 7-11

Receiver Differential Squelch Threshold

VDS

300

540

585

TABLE 7-12:

I/O BUFFER CHARACTERISTICS (CONTINUED)

Parameter

Symbol

Min.

Typ.

Max.

Unit

Note

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