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MCP79412 Datasheet(PDF) 11 Page - Microchip Technology

Part # MCP79412
Description  Dual Programmable Alarms
PDF  66 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP79412 Datasheet(HTML) 11 Page - Microchip Technology

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 2010-2016 Microchip Technology Inc.
DS20002266H-page 11
MCP79410/MCP79411/MCP79412
5.0
FUNCTIONAL DESCRIPTION
The MCP7941X is a highly-integrated Real-Time
Clock/Calendar
(RTCC).
Using
an
on-board,
low-power oscillator, the current time is maintained in
seconds, minutes, hours, day of week, date, month,
and year. The MCP7941X also features 64 bytes of
general purpose SRAM, 1 Kbit of EEPROM and eight
bytes of protected EEPROM. Two alarm modules allow
interrupts to be generated at specific times with flexible
comparison options. Digital trimming can be used to
compensate for inaccuracies inherent with crystals.
Using the backup supply input and an integrated power
switch, the MCP7941X will automatically switch to
backup power when primary power is unavailable,
allowing the current time and the SRAM contents to be
maintained. The time-stamp module captures the time
when primary power is lost and when it is restored.
The RTCC configuration and STATUS registers are
used to access all of the modules featured on the
MCP7941X.
5.1
Memory Organization
The MCP7941X features four different blocks of
memory: the RTCC registers, general purpose SRAM,
1 Kbit EEPROM with software write-protect, and
protected EEPROM. The RTCC registers and SRAM
share the same address space, accessed through the
‘1101111X’ control byte. The EEPROM regions are in
a separate address space and are accessed using the
‘1010111X’
control
byte
(Figure 5-1).
Unused
locations are not accessible. The MCP7941X will not
acknowledge if the address is out of range, as shown
in the shaded region of the memory map in Figure 5-1.
The RTCC registers are contained in addresses
0x00-0x1F. Table 5-1 shows the detailed RTCC
register map. There are 64 bytes of user-accessible
SRAM, located in the address range 0x20-0x5F. The
SRAM is a separate block from the RTCC registers. All
RTCC registers and SRAM locations are maintained
while operating from backup power.
The EEPROM space is located in addresses
0x00-0x7F while the protected EEPROM section is
located in addresses 0xF0-0xF7. A STATUS register,
used to protect regions of the EEPROM section, is
located at address 0xFF.



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