TAS5110

SLES028A – MAY 2002 – REVISED SEPTEMBER 2002

11

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PARAMETER

MIN

NOM

MAX

UNIT

Shutdown junction temperature, TJ(SD)

150

°C

Warning junction temperature, TJ(W)

125

°C

Operating temperature TC

Commercial

0

25

70

°C

Operating temperature, TC

Industrial

–40

25

85

°C

Thermal resistance junction-to-case,

θjc}

2 oz trace and copper pad without solder

1.6

°C/W

Thermal resistance junction-to-ambient,

θja}

2 oz. trace and copper pad without solder

44.3

°C/W

† One of the most influential components on the thermal performance of a package is board design. In order to take full advantage of the heat

dissipating abilities of the PowerPAD packages, a board must be used that acts similar to a heat sink and allows for the use of the exposed (and

solderable), deep downset pad. See Appendix A of the PowerPAD Thermally Enhanced Package application note, TI literature number

SLMA002.

‡ For both DAD and DAP packages.

PARAMETER

MIN

NOM

MAX

UNIT

Digital

DVDD to DVSS

3

3.3

3.6

V

PVDDA2 to PVSS

16.5

22

26.5

Supply voltage

Regulator

PVDDB2 to PVSS

16.5

22

26.5

V

yg

Regulator

PVDDA2 to PVSSw

10.5

16.5

V

PVDDB2 to PVSSw

10.5

16.5

§ Connect LDROUTA to PVDDA2 and connect LDROUTB to PVDDB2. Under this condition, the H-bridge forward on-state resistance is increased.

This increases internal power dissipation. Maximum output power may need to be reduced to meet thermal conditions.

maximum available power at common load impedances for both DAP and DAD packages unclipped (0 dB)

level, test conditions described in the Thermal Methodology for the 32-Pin DAD Package 50 W, 6-

Ω Test and

Thermal Methodology for the 32-Pin DAP Package 50 W, 6-

Ω Test sections

LOAD IMPEDANCE (

Ω)

PVDAA1/PVDDB1 (VDC)

APPROXIMATE MAX OUTPUT POW-

THD+N AT MAX POWER AND 1 kHz

LOAD IMPEDANCE (

Ω)

PVDAA1/PVDDB1 (VDC)

APPROXIMATE MAX OUTPUT POW-

ER (W)

THD+N AT MAX POWER AND 1 kHz

INPUT¶

6

27

50

< 10%

6

27

43

< 0.09%

8

27

34

< 0.09%

¶ Dependent on board design and component selection.

static digital specifications

PARAMETERS

MIN

MAX

UNIT

High-level input voltage, VIH

2

V

Low-level input voltage, VIL

0.8

V

Input leakage current

–10

10

µA

PARAMETERS

MIN

MAX

UNIT

Internal pullup resistors from SHUTDOWN, ERR0, ERR1 to DVDD

15

k

Ω

Low-level output voltage (IO = 4 mA), VOL

0.4

V