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MB91F465KB Datasheet(PDF) 34 Page - Cypress Semiconductor

Part # MB91F465KB
Description  32-bit RISC, load/store architecture, five-stage pipeline
PDF  86 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

MB91F465KB Datasheet(HTML) 34 Page - Cypress Semiconductor

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MB91460K Series
Document Number: 002-04602 Rev. *A
Page 34 of 86
86
9.6.3
Security Vector FSV2
The setting of the Flash Security Vector FSV2 bits [31:0] is responsible for the individual write protection of the 64 Kbytes sectors. It
is only evaluated if write protection bit FSV1 [17] is set.
Table 4: Explanation of the bits in the Flash Security Vector FSV2[31:0]
MB91F465Kx:
Note: See section “Flash access in CPU mode” for an overview about the sector organisation of the Flash Memory.
10. Memory Space
The FR family has 4 Gbytes of logical address space (232 addresses) available to the CPU by linear access.
■ Direct addressing area
The following address space area is used for I/O.
This area is called direct addressing area, and the address of an operand can be specified directly in an instruction.
The size of directly addressable area depends on the length of the data being accessed as shown below.
Byte data access: 000H to 0FFH
Half word access: 000H to 1FFH
Word data access: 000H to 3FFH
FSV2 bit
Sector
Enable Write Pro-
tection
Disable Write
Protection
Comment
FSV2[3:0]
-
set to “0”
set to “1”
not available
FSV2[4]
SA12
set to “0”
set to “1”
FSV2[5]
SA13
set to “0”
set to “1”
FSV2[6]
SA14
set to “0”
set to “1”
FSV2[7]
SA15
set to “0”
set to “1”
FSV2[8]
SA16
set to “0”
set to “1”
FSV2[9]
SA17
set to “0”
set to “1”
FSV2[10]
SA18
set to “0”
set to “1”
FSV2[11]
SA19
set to “0”
set to “1”
FSV2[31:12]
-
set to “0”
set to “1”
not available



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