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MB91F465KB Datasheet(PDF) 68 Page - Cypress Semiconductor

Part # MB91F465KB
Description  32-bit RISC, load/store architecture, five-stage pipeline
PDF  86 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

MB91F465KB Datasheet(HTML) 68 Page - Cypress Semiconductor

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MB91460K Series
Document Number: 002-04602 Rev. *A
Page 68 of 86
86
15.3
DC Characteristics
Note: In the following tables, “VDD” means VDD5 for all pins.
In the following tables, “VSS” means VSS5 for all pins.
(VDD5 AVCC5 3.0 V to 5.5 V, VSS5 AVSS5 0 V, TA 40°C to  105°C)
Parameter
Symbol
Pin name
Condition
Value
Unit
Remarks
Min
Typ
Max
Input “H”
voltage
VIH
-
Port inputs if CMOS
Hysteresis 0.8/0.2 input
is selected
0.8
VDD
-
VDD  0.3
V
CMOS hysteresis input
-
Port inputs if CMOS
Hysteresis 0.7/0.3 input
is selected
0.7
VDD
-
VDD  0.3
V
4.5 V
 VDD  5.5 V
0.74
VDD
-
VDD  0.3
V
3 V
 VDD < 4.5 V
-
AUTOMOTIVE Hystere-
sis input is selected
0.8
VDD
-
VDD  0.3
V
-
Port inputs if TTL input is
selected
2.0
-
VDD  0.3
V
VIHR
INITX
-
0.8
VDD
-
VDD  0.3
V
INITX input pin (CMOS
Hysteresis)
VIHM
MD_2 to MD_0
-
VDD  0.3
-
VDD  0.3
V
Mode input pins
VIHX0S
X0, X0A
-
2.5
-
VDD  0.3
V
External clock in
“Oscillation mode”
VIHX0F
X0
-
0.8
VDD
-
VDD  0.3
V
External clock in “Fast
Clock Input mode”
Input “L”
voltage
VIL
-
Port inputs if CMOS
Hysteresis 0.8/0.2 input
is selected
VSS  0.3
-
0.2
VDD
V
-
Port inputs if CMOS
Hysteresis 0.7/0.3 input
is selected
VSS  0.3
-
0.3
VDD
V
-
Port inputs if
AUTOMOTIVE
Hysteresis input is se-
lected
VSS  0.3
-
0.5
VDD
V
4.5 V
 VDD  5.5 V
VSS  0.3
-
0.46
VDD
V3 V
 VDD < 4.5 V
-
Port inputs if TTL input is
selected
VSS  0.3
-
0.8
V
VILR
INITX
-
VSS  0.3
-
0.2
VDD
V
INITX input pin (CMOS
Hysteresis)
VILM
MD_2 to MD_0
-
VSS  0.3
-
VSS  0.3
V
Mode input pins
VILXDS
X0, X0A
-
VSS  0.3
-
0.5
V
External clock in
“Oscillation mode”



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