P9028AC datasheet(5/38 Pages) IDT

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P9028AC

Product Datasheet

Revision 1.0.3

ELECTRICAL SPECIFICATION TABLE

VRECT=6V, COUT=1uF, CVRECT=20uF, VEN=0V, TA = 0C to 85C, unless otherwise noted. Typical values are at 25°C, unless otherwise noted.

Table 4. Device Characteristics (Continued).

Symbol

Description

Conditions

Min

Typ

Max

Units

SCL, SDA (I

2C Interface)

fSCL

Clock Frequency

400

kHz

tLOW

Clock Low Period

1.3

µs

tHIGH

Clock High Period

0.6

µs

tHD,STA

Hold Time (Repeated) for

START Condition

0.6

µs

tSU:STA

Set-up Time for

Repeated START

Condition

0.6

µs

tSU:DAT

Data Setup Time

100

tHD:DAT

Data Hold Time

0.9

µs

tSU:STO

Setup Time for STOP

Condition

0.6

µs

tBUF

Bus Free Time Between

STOP and START

Condition

1.3

µs

Rise Time of Both SDA

and SCL Signals (Note 1,2)

20 + 0.1 CB

300

Fall Time of Both SDA

and SCL Signals (Note 1,2)

20 + 0.1 CB

300

TSP

Spike Pulse Widths

Suppressed by Input

Filter (Note 1,2)

Capacitive Load for Each

Bus Line (Note 1,2)

400

CBIN

SCL, SDA Input

Capacitance (Note 1,2)

VIL

Input Threshold Low

0.4

VIH

Input Threshold High

1.4

Input Leakage Current

-1.0

1.0

µA

Note 1: Guaranteed by design. Not 100% tested in production.

Note 2: Guaranteed by design/simulation data.

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