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P9028AC Datasheet(PDF) 12 Page - Integrated Device Technology

Part # P9028AC
Description  Dual-Mode WPC/PMA 5 Watt Wireless Power Receiver IC
PDF  38 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

P9028AC Datasheet(HTML) 12 Page - Integrated Device Technology

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P9028AC
Product Datasheet
Revision 1.0.3
12
©2015IntegratedDeviceTechnology,Inc.
Table 6. TQFN Pin Descriptions.
Pin #
Name
Type
Description
1
INT
O
Interrupt output. Open drain output pin. A low condition indicates that an OC, OV,
or OT event has occurred.
2
DNC1
DNC
DO NOT connect to this pin, it is internally connected.
This pin must be left floating.
3
DNC2
DNC
DO NOT connect to this pin, it is internally connected.
This pin must be left floating.
4
BST2
O
Bootstrap output for high-side rectifier FET 2.
5
BST1
O
Bootstrap output for high-side rectifier FET 1.
6
AC1
I
AC1 input to the Internal full-wave rectifier.
7
VRECT
O
Output of the full-wave rectifier.
8
RLIM
I
Current-limit resistor. A resistor connected between this pin and ground sets the
current limit of the 5V LDO.
9
SNS
I
LDO output sense pin. Connect to the OUT pin (TQFN only).
10
CHG_END/CS100
I
Active-high input pin. Default setting is a Charge-End active-high input from an
external battery charger to terminate power transfer. Alternatively, a Charge-
Status active high input which will send a WPC Charge Status packet with value
100 (100% charge). In PMA mode, an End Of Charge (EOC) command will be
sent. This pin has an internal pull down resistor.
11
NC1
NC
Not internally connected. This pin may be connected to others to facilitate routing
or to improve thermal performance.
12
OUT
O
5V LDO output. A 1μF ceramic capacitor must be connected between this pin
and ground.
13
NC2
NC
Not internally connected. This pin may be connected to others to facilitate routing
or to improve thermal performance.
14
EN
I
Active-low enable pin. The chip is suspended and placed in low-current (sleep)
mode when pulled high. This pin is pulled low inside the chip.
15
TEOP
I
Active-high over-temperature input pin. If this pin is pulled high, the chip will send
a WPC EOP packet with code 0x03 (over-temperature code) or a PMA EOC
signal. This pin has an internal pull down resistor.
16
NC3
NC
Not internally connected. This pin may be connected to others to facilitate routing
or to improve thermal performance.
17
CLAMP2
I
AC clamp input 2.
18
PGND2
-
Power ground for the AC clamp FETs.
19
CLAMP1
I
AC clamp input 1.
20
FOD2
I
FOD2 adjustment
21
ACM1
I
AC Modulation input 1.
22
PGND1
-
Power ground for the full-wave rectifier.
23
ACM2
I
AC Modulation input 2.
24
NC4
NC
Not internally connected. This pin may be connected to others to facilitate routing
or to improve thermal performance.
25
FOD1
I
Select FOD settings
26
SDA
I/O
I
2C data port. If not used, connect to ground.
27
SCL
I
I
2C clock port. If not used, connect to ground.
28
AGND
-
Analog ground connection.
29
VDD
O
Internal voltage supply. Connect a 1uF to 10uFcapacitor between this pin and
ground. Must be left unloaded.



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