ACT8946A datasheet(14/37 Pages) ACTIVE-SEMI

14 / 37 page

ACT8946AQJ203-T

Rev 1.0, 08-Jul-16

ActivePMU and ActivePath are trademarks of Active-Semi.

14 -

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

: Valid only when CHGIN UVLO Threshold<VCHGIN<CHGIN OVP Threshold.

OUTPUT ADDRESS BIT

NAME

ACCESS

DESCRIPTION

REG7

0x64

[7:6]

Reserved.

REG7

0x64

[5:0]

VSET

R/W

Output Voltage Selection. See the Output Voltage

Programming section for more information.

REG7

0x65

[7]

R/W

Regulator Enable Bit. Set bit to 1 to enable the regulator, clear

bit to 0 to disable the regulator.

REG7

0x65

[6]

DIS

R/W

Output Discharge Control. When activated, LDO output is

discharged to GA through 1.5kΩ resistor when in shutdown.

Set bit to 1 to enable output voltage discharge in shutdown,

clear bit to 0 to disable this function.

REG7

0x65

[5]

LOWIQ

R/W

LDO Low-IQ Mode Control. Set bit to 1 for low-power

operating mode, clear bit to 0 for normal mode.

REG7

0x65

[4:2]

DELAY

R/W

Regulator Turn-On Delay Control. See the REG4, REG5,

REG6, REG7 Turn-on Delay section for more information.

REG7

0x65

[1]

nFLTMSK

R/W

Regulator Fault Mask Control. Set bit to 1 enable fault-

interrupts, clear bit to 0 to disable fault-interrupts.

REG7

0x65

[0]

Regulator Power-OK Status. Value is 1 when output voltage

exceeds the power-OK threshold, value is 0 otherwise.

APCH

0x70

[7:0]

R/W

Reserved.

APCH

0x71

[7]

SUSCHG

R/W

Charge Suspend Control Input. Set bit to 1 to suspend

charging, clear bit to 0 to allow charging to resume.

APCH

0x71

[6]

R/W

Reserved.

APCH

0x71

[5:4]

TOTTIMO

R/W

Total Charge Time-out Selection. See the Charge Safety

Timers section for more information.

APCH

0x71

[3:2]

PRETIMO

R/W

Precondition Charge Time-out Selection. See the Charge

Safety Timers section for more information.

APCH

0x71

[1:0]

OVPSET

R/W

Input Over-Voltage Protection Threshold Selection. See the

Input Over-Voltage Protection section for more information.

APCH

0x78

[7]

TIMRSTAT

R/W

Charge Time-out Interrupt Status. Set this bit with

TIMRPRE[ ] and/or TIMRTOT[ ] to 1 to generate an interrupt

when charge safety timers expire, read this bit to get charge

time-out interrupt status. See the Charge Safety Timers

section for more information.

APCH

0x78

[6]

TEMPSTAT

R/W

Battery Temperature Interrupt Status. Set this bit with

TEMPIN[ ] and/or TEMPOUT[ ] to 1 to generate an interrupt

when a battery temperature event occurs, read this bit to get

the battery temperature interrupt status. See the Battery

Temperature Monitoring section for more information.

APCH

0x78

[5]

INSTAT

R/W

Input Voltage Interrupt Status. Set this bit with INCON[ ] and/or

INDIS[ ] to generate an interrupt when UVLO or OVP condition

occurs, read this bit to get the input voltage interrupt status.

See the Charge Current Programming section for more

information.

APCH

0x78

[4]

CHGSTAT

R/W

Charge State Interrupt Status. Set this bit with

CHGEOCIN[ ] and/or CHGEOCOUT[ ] to 1 to generate an

interrupt when the state machine gets in or out of EOC state,

read this bit to get the charger state interrupt status. See the

State Machine Interrupts section for more information.

APCH

0x78

[3]

TIMRDAT

Charge Timer Status. Value is 1 when precondition time-out or

total charge time-out occurs. Value is 0 in other case.

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