ACT8946A datasheet(25/37 Pages) ACTIVE-SEMI

25 / 37 page

ACT8946AQJ203-T

Rev 1.0, 08-Jul-16

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SYSTEM CONTROL INFORMATION

Interfacing with the Hi351E Processors

Table 2: ACT8946AQJ203 and Hi3518E Power Domains

POWER DOMAIN

ACT8946A CHANNEL TYPE DEFAULT VOLTAGE CURRENT CAPABILITY

V_Core_D

REG1

DC/DC

1.1V

1100mA

V_Core_A

REG2

DC/DC

1.8V

1100mA

V_DDR

REG3

DC/DC

1.8V

1100mA

V_IO

REG4

LDO

3.3V

320mA

Auxiliary 1

REG5

LDO

320mA

Auxiliary 2

REG6

LDO

320mA

Auxiliary 3

REG7

LDO

320mA

Control Signals

Enable Inputs

The ACT8946A features a variety of control inputs,

which are used to enable and disable outputs

depending upon the desired mode of operation.

PWRHLD is a logic input,

nIRQ Output

nIRQ is an open-drain output that asserts low any

time an interrupt is generated. Connect a 10kΩ or

greater pull-up resistor from nIRQ to an appropriate

voltage supply. nIRQ is typically used to drive the

interrupt input of the system processor.

Many of the ACT8946A's functions support

interrupt-generation

result

various

conditions. These are typically masked by default,

but may be unmasked via the I2C interface. For

information

about

the

available

fault

conditions, refer to the appropriate sections of this

datasheet.

Note that under some conditions a false interrupt

may be generated upon initial startup. For this

reason, it is recommended that the interrupt service

routine check and validate nSYSLEVMSK[-] and

nFLTMSK[-] bits before processing an interrupt

generated by these bits. These interrupts may be

validated by nSYSSTAT[-], OK[-] bits.

Figure 2: ACT8946AQJ203-T Enable/Disable Sequence

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