April 2004

7

M9999-042804

MIC5191

Micrel

Applications Information

Designing with the MIC5191

Anatomy of a transient response

A voltage regulator can maintain a set output voltage while its

exterior world is pushing and pulling in its demand for power.

The measure of a regulator is generally how accurately and

effectively it can maintain that voltage, regardless of how the

load demands power. One measure of regulator response is

the load step. This is an intuitive look at how the regulator

responds to a change in load current. Figure 2 is a look at the

transient response to a load step.

Figure 2. Typical Transient Response

At the start of a circuit's power demand, the output voltage is

regulated to its set point, while the load current runs at a

constant rate. For many different reasons, a load may ask for

more current without warning. When this happens, the regu-

lator needs some time to determine the output voltage drop.

This is determined by the speed of the control loop. So, until

enough time has elapsed, the control loop is oblivious to the

voltage change. The output capacitor must bear the burden

of maintaining the output voltage.

∆ V L

di

dt

=

Since this is a sudden change in voltage, the capacitor will try

to maintain voltage by discharging current to the output. The

first voltage drop is due to the output capacitor's ESL (equiva-

lent series inductance). The ESL will resist a sudden change

in current from the capacitor and drop the voltage quickly. The

amount of voltage drop during this time will be proportional to

the output capacitor's ESL and the speed at which the load

steps. Slower load current transients will reduce this effect.

∆V

L

di

dt

↓=

↑

Placing multiple small capacitors with low ESL in parallel can

help reduce the total ESL and reduce voltage droop during

high speed transients. For high speed transients, the greatest

voltage deviation will generally be caused by output capacitor

ESL and parasitic inductance.

∆V

L

di

dt

↓= ↓

After the current has overcome the effects of the ESL, the

output voltage will begin to drop proportionally to time and

inversely proportional to output capacitance.

The relationship to output voltage variation will depend on two

aspects, loop bandwidth and output capacitance. The output

capacitance will determine how far the voltage will fall over a

given time. With more capacitance, the drop in voltage will fall

at a decreased rate. This is the reason that for the same

bandwidth, more capacitance provides a better transien-

response

Also, the time it takes for the regulator to respond is directl

proportional to its gain bandwidth. Higher bandwidth contro

loops respond quicker causing a reduced droop on the suppl

for the same amount of capacitance

Final recovery back to the regulated voltage is the final phas

of transient response and the most important factors are gai

and time. Higher gain at higher frequency will get the outpu

voltage closer to its regulation point quicker. The final settlin

point will be determined by the load regulation, which i

proportional to DC (0Hz) gain and the associated loss terms

There are other factors that contribute to large signal tran-

sient response, such as source impedance, phase margin

and PSRR. For example, if the input voltage drops due t

source impedance during a load transient, this will contribut

to the output voltage deviation by filtering through to th

output reduced by the loops PSRR at the frequency of th

voltage transient. It is straightforward: good input capaci-

tance reduces the source impedance at high frequencies

Having between 35

° and 45° of phase margin will help spee

up the recovery time. This is caused by the initial overshoo

in response to the loop sensing a low voltage

Compensatio

The MIC5191 allows the flexibility of externally controlling th

gain and bandwidth. This allows the MIC5191 design to b

tailored to each individual design

In designing the MIC5191, it is important to maintain ad-

equate phase margin. This is generally achieved by havin

the gain cross the 0dB point with a single pole 20dB/decad

roll-off. The compensation pin is configured as Figure

demonstrates

Figure 3. Internal Compensatio

∆V

C

idt

=∫

1

∆V

C

idt

↓=

↑

∫

1

∆V

C

idt

↓= ∫

↓

1

Time

C

V =

1

BW

1

Output voltage vs. time

during recovery is

directly proportional to

gain vs. frequency.

∆ V = L

di

dt