VCNL4040

www.vishay.com

Vishay Semiconductors

Rev. 1.4, 02-Mar-15

10

Document Number: 84274

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

TABLE 3 - REGISTER: 00H_H DESCRIPTION

REGISTER: Reserved

COMMAND CODE: 0x00_H (0x00 DATA BYTE HIGH)

Command

Bit

Description

Reserved

7 : 0

Default = (0 : 0 : 0 : 0 : 0 : 0 : 0 : 0)

TABLE 4 - REGISTER ALS_THDH_L AND ALS_THDH_M DESCRIPTION

COMMAND CODE: 0x01_L (0x01 DATA BYTE LOW) OR 0x01_H (0x01 DATA BYTE HIGH)

Register

Bit

Description

ALS_THDH_L

7 : 0

0x00 to 0xFF, ALS high interrupt threshold LSB byte

ALS_THDH_M

7 : 0

0x00 to 0xFF, ALS high interrupt threshold MSB byte

TABLE 5 - REGISTER: ALS_THDL_L AND ALS_THDL_M DESCRIPTION

COMMAND CODE: 0x02_L (0x02 DATA BYTE LOW) AND 0x02_H(0x02 DATA BYTE HIGH)

Register

Bit

Description

ALS_THDL_L

7 : 0

0x00 to 0xFF, ALS low interrupt threshold LSB byte

ALS_THDL_M

7 : 0

0x00 to 0xFF, ALS low interrupt threshold MSB byte

TABLE 6 - REGISTER: PS_CONF1 DESCRIPTION

REGISTER: PS_CONF1

COMMAND CODE: 0x03_L (0x03 DATA BYTE LOW)

Command

Bit

Description

PS_Duty

7 : 6

(0 : 0) = 1/40, (0 : 1) = 1/80, (1 : 0) = 1/160, (1 : 1) = 1/320

PS IRED on / off duty ratio setting

PS_PERS

5 : 4

(0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 3, (1 : 1) = 4

PS interrupt persistence setting

PS_ IT

3 : 1

(0 : 0 : 0) = 1T, (0 : 0 : 1) = 1.5T, (0 : 1 : 0) = 2T, (0 : 1 : 1) = 2.5T, (1 : 0 : 0) = 3T, (1 : 0 : 1) = 3.5T,

(1 : 1 : 0) = 4T, (1 : 1 : 1) = 8T, PS integration time setting

PS_SD

0

0 = PS power on, 1 = PS shut down, default = 1

TABLE 7 - REGISTER: PS_CONF2 DESCRIPTION

REGISTER: PS_CONF2

COMMAND CODE: 0x03_H (0x03 DATA BYTE HIGH)

Command

Bit

Description

Reserved

7 : 6

(0 : 0), reserved

Reserved

5 : 4

(0 : 0), reserved

PS_HD

3

0 = PS output is 12 bits; 1 = PS output is 16 bits

Reserved

2

Default = 0

PS_INT

1 : 0

(0 : 0) = interrupt disable, (0 : 1) = trigger when close, (1 : 0)= trigger when away,

(1 : 1)= trigger when close or away

TABLE 8 - REGISTER: PS_CONF3 DESCRIPTION

REGISTER: PS_CONF3

COMMAND CODE: 0x04_L (0x04 DATA BYTE LOW)

Command

Bit

Description

Reserved

7

0

Reserved

6 : 5

(0 : 0)

PS_SMART_PERS

4

0 = disable; 1 = enable PS smart persistence

PS_AF

3

0 = active force mode disable (normal mode), 1 = active force mode enable

PS_TRIG

2

0 = no PS active force mode trigger, 1 = trigger one time cycle

VCNL4040 output one cycle data every time host writes in ‘1’ to sensor.

The state returns to ‘0’ automatically.

Reserved

1 : 0

(0 : 0)