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MT8880CS/CS-1 Datasheet(PDF) 15 Page - Mitel Networks Corporation

Part # MT8880CS/CS-1
Description  Integrated DTMFTransceiver
PDF  18 Pages
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Manufacturer  MITEL [Mitel Networks Corporation]
Direct Link  http://www.mitel.com
Logo MITEL - Mitel Networks Corporation

MT8880CS/CS-1 Datasheet(HTML) 15 Page - Mitel Networks Corporation

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ISO2-CMOS
MT8880C/MT8880C-1
4-47
† Characteristics are over recommended operating conditions unless otherwise stated
‡ Typical figures are at 25°C, VDD = 5V, and for design aid only: not guaranteed and not subject to production testing
* See “Notes” AC Electrical Characteristics Tables
AC Electrical Characteristics† - Call Progress - Voltages are with respect to ground (V
SS) unless otherwise stated.
Characteristics
Sym
Min
Typ‡
Max
Units
Notes*
1
Lower freq. (ACCEPT)
fLA
320
Hz
@ -25 dBm
2
Upper freq. (ACCEPT)
fHA
510
Hz
@ -25 dBm
3
Lower freq. (REJECT)
fLR
290
Hz
@ -25 dBm
4
Upper freq. (REJECT)
fHR
540
Hz
@ -25 dBm
5
Call progress tone detect level
(total power)
-30
dBm
AC Electrical Characteristics† - Voltages are with respect to ground (V
SS) unless otherwise stated.
Characteristics
Sym
Min
Typ‡
Max
Units
Conditions
1
R
X
Tone present detect time
tDP
3
1114ms
Note 12
2
Tone absent detect time
tDA
0.5
4
8.5
ms
Note 12
3
Tone duration accept
tREC
40
ms
User adjustable#
4
Tone duration reject
tREC
20
ms
User adjustable#
5
Interdigit pause accept
tID
40
ms
User adjustable#
6
Interdigit pause reject
tDO
20
ms
User adjustable#
7
Delay St to b3
tPStb3
13
µs
8
Delay St to RX0-RX3
tPStRX
8
µs
9
T
X
Tone burst duration
tBST
50
52
ms
DTMF mode
10
Tone pause duration
tPS
50
52
ms
DTMF mode
11
Tone burst duration (extended)
tBSTE
100
104
ms
Call Progress mode
12
Tone pause duration (extended)
tPSE
100
104
ms
Call Progress mode
13
T
O
N
E
O
U
T
High group output level
VHOUT
-6.1
-2.1
dBm
RL=10kΩ
14
Low group output level
VLOUT
-8.1
-4.1
dBm
RL=10kΩ
15
Pre-emphasis
dBP
23
dB
RL=10kΩ
16
Output distortion (Single Tone)
THD
-35
dB
25 kHz Bandwidth
RL=10kΩ
17
Frequency deviation
fD
±0.7
±1.5
%
fC=3.579545 MHz
18
Output load resistance
RLT
10
50
k
Ω
19
M
P
U
I
N
T
E
R
F
A
C
E
Φ2 cycle period
tCYC
250
ns
20
Φ2 high pulse width
tCH
115
ns
21
Φ2 low pulse width
tCL
110
ns
22
Φ2 rise and fall time
tR, tF
25
ns
23
Address, R/W hold time
tAH,tRWH
26
ns
24
Address, R/W setup time (before
Φ2) t
AS,tRWS
23
ns
25
Data hold time (read)
tDHR
22
ns
*
26
Φ2 to valid data delay (read)
tDDR
100
ns
200 pF load
27
Data setup time (write)
tDSW
45
ns



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