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LP3927 Datasheet(PDF) 10 Page - National Semiconductor (TI) |
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LP3927 Datasheet(HTML) 10 Page - National Semiconductor (TI) |
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10 / 16 page ![]() Keyboard Start-Up/Shut-Down 20037925 Note: Diagram indicates Open Drain IRQ tied to VDD. *** = Internal signal 1. Keyboard de-bounce delay, 32 msec typ. 2. Delay between LDO1 reaching 95% of its output voltage and LDO2 enable, 125 µsec typical. 3. Both LDO1 and LDO2 outputs reach 95% of respective output voltage, start RST timer. 4. RST delay, 20 msec typical. 5. IRQ is active low. 6. Keyboard press must be greater than 32 msec. 7. PS_HOLD timer begins upon RST going high. 8. Maximum of 500 msec period from RST going high to PS_HOLD going high. 9. Response time from PS_HOLD going low to RST going low. 10. Delay between RST high-low transition to LDO2 disable. 11. Delay between LDO2 disable and LDO1 disable. www.national.com 10 |
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