Connection of two EVALSTGAP1AS boards

UM2120

6/18

DocID029823 Rev 1

2

Connection of two EVALSTGAP1AS boards

It is possible to connect two EVALSTGAP1AS boards through connectors J1 and J5: the

lower board (master) shall be connected to the µC and the other one (slave) is configured

through the daisy chain connection of the SPI bus.

Figure 4. Relevant jumper and connector locations for 2-board configuration

Connecting two EVALSTGAP1AS boards allows implementing independent, half bridge, or

The logic side power supply VDD shall be fed to the J6 of the master board, that will also

supply the slave board through J1 - J5 connectors. The jumper JP4 and JP6 of each board

Positive VH and optional negative VL power supplies for each board shall be independently

operation is required, in which case VH, GNDISO and VL nets of each board shall be

externally connected. The jumper JP5 of each board shall be properly configured (see

Table 5).

Table 8. Jumper configurations for SPI settings using two EVALSTGAP1AS boards

Name

Function

Jumper configurations

SPI daisy chain configuration

OPEN

SPI daisy chain configuration

CLOSED