TMS417409A datasheet(9/37 Pages) NSC

9 / 37 page

TMS416409A, TMS417409A, TMS426409A, TMS427409A

4194304 BY 4-BIT EXTENDED DATA OUT

DYNAMIC RANDOM-ACCESS MEMORIES

SMKS893B – AUGUST 1996 – REVISED APRIL 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

electrical characteristics over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted)

TMS416409A

PARAMETER

TEST CONDITIONS†

’416409A - 50

’416409A - 60

’416409 A- 70

UNIT

PARAMETER

TEST CONDITIONS†

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

VOH

High-level output

voltage

IOH = – 5 mA

2.4

VOL

Low-level output voltage

IOL = 4.2 mA

0.4

Input current (leakage)

VCC = 5.5 V,

VI = 0 V to 6.5 V,

All others = 0 V to VCC

± 10

µA

Output current

(leakage)

VCC = 5.5 V,

VO = 0 V to VCC,

CAS high

± 10

µA

ICC1‡§

Average read- or

write-cycle current

VCC = 5.5 V,

Minimum cycle

100

ICC2

Average standby

VIH = 2.4 V ( TTL),

After one memory cycle,

RAS and CAS high

ICC2

current

VIH = VCC – 0.2 V (CMOS),

After one memory cycle,

RAS and CAS high

ICC3‡§

Average refresh current

(RAS-only refresh or

CBR)

VCC = 5.5 V,

Minimum cycle,

RAS cycling,

CAS high (RAS only),

RAS low after CAS low (CBR)

100

ICC4‡¶ Average EDO current

VCC = 5.5 V,

tHPC = MIN,

RAS low,

CAS cycling

100

† For conditions shown as MIN / MAX, use the appropriate value specified in the timing requirements.

‡ Measured with outputs open

§ Measured with a maximum of one address change while RAS = VIL

¶ Measured with a maximum of one address change during each EDO cycle, tHPC

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